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ISP1161A1BM Datasheet(PDF) 3 Page - NXP Semiconductors |
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ISP1161A1BM Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 136 page Philips Semiconductors ISP1161A1 USB single-chip host and device controller Product data Rev. 03 — 23 December 2004 3 of 136 9397 750 13961 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 2. Features s Complies with Universal Serial Bus Specification Rev. 2.0 s The Host Controller portion of the ISP1161A1 supports data transfer at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) s The Device Controller portion of the ISP1161A1 supports data transfer at full-speed (12 Mbit/s) s Combines the HC and the DC in a single chip s On-chip DC complies with most USB device class specifications s Both the HC and the DC can be accessed by an external microprocessor via separate I/O port addresses s Selectable one or two downstream ports for the HC and one upstream port for the DC s High-speed parallel interface to most of the generic microprocessors and Reduced Instruction Set Computer (RISC) processors such as: x Hitachi® SuperH™ SH-3 and SH-4 x MIPS-based™ RISC x ARM7™, ARM9™, StrongARM® s Maximum 15 Mbyte/s data transfer rate between the microprocessor and the HC, 11.1 Mbyte/s data transfer rate between the microprocessor and the DC s Supports single-cycle and burst mode DMA operations s Up to 14 programmable USB endpoints with 2 fixed control IN/OUT endpoints for the DC s Built-in separate FIFO buffer RAM for the HC (4 kbytes) and DC (2462 bytes) s Endpoints with double buffering to increase throughput and ease real-time data transfer for both DC transfers and HC isochronous (ISO) transactions s 6 MHz crystal oscillator with integrated PLL for low EMI s Controllable LazyClock (100 kHz ± 50 %) output during ‘suspend’ s Clock output with programmable frequency (3 MHz to 48 MHz) s Software controlled connection to USB bus (SoftConnect) on upstream port for the DC s Good USB connection indicator that blinks with traffic (GoodLink) for the DC s Software selectable internal 15 k Ω pull-down resistors for HC downstream ports s Dedicated pins for suspend sensing output and wake-up control input for flexible applications s Global hardware reset input pin and separate internal software reset circuits for HC and DC s Operation from a 5 V or a 3.3 V power supply s Operating temperature range −40 °Cto +85 °C s Available in two LQFP64 packages (SOT314-2 and SOT414-1). |
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