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SN74LVC1G34DRLR Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LVC1G34DRLR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 14 page www.ti.com A Y 2 4 A Y 1 3 SN74LVC1G34 SINGLE BUFFER GATE SCES519F – DECEMBER 2003 – REVISED OCTOBER 2005 ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoStar™ – WCSP (DSBGA) SN74LVC1G34YEPR 0.23-mm Large Bump – YEP Reel of 3000 _ _ _C9_ NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP SN74LVC1G34YZPR (Pb-free) NanoStar™ – WCSP (DSBGA) _ _ _ _ 0.23-mm Large Bump – YZV Reel of 3000 SN74LVC1G34YZVR C9 –40 °C to 85°C (Pb-free) Reel of 3000 SN74LVC1G34DBVR SOT (SOT-23) – DBV C34_ Reel of 250 SN74LVC1G34DBVT Reel of 3000 SN74LVC1G34DCKR SOT (SC-70) – DCK Reel of 250 SN74LVC1G34DCKT C9_ SOT (SOT-553) – DRL Reel of 4000 SN74LVC1G34DRLR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YEP, YZA/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). YZV: The actual top-side marking is on two lines. Line 1 has four characters to denote year, month, day, and assembly/test site. Line 2 has two characters which show the family and function code. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE INPUT OUTPUT A Y H H L L LOGIC DIAGRAM (POSITIVE LOGIC) (DBV, DCK, DRL, YEA, YEP, YZA, and YZP Package) LOGIC DIAGRAM (POSITIVE LOGIC) (YZV Package) 2 |
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