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QPF8248SR Datasheet(PDF) 5 Page - TriQuint Semiconductor |
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QPF8248SR Datasheet(HTML) 5 Page - TriQuint Semiconductor |
5 / 7 page QPF8248 Wi-Fi Front End Module Data Sheet REV C 20161219 | Subject to change without notice 5 of 7 www.qorvo.com Pin Configuration and Description Top View Pin Number Label Description 1 PDET DC power detector. Provides an output voltage proportional to the RF output power level 2 NC No electrical connection. It may be left floating or connected to ground. 3 VCC 1st and 2nd stage supply voltage 4 VCC 3rd stage supply voltage 5 TX RF input. Internally matched to 50 Ω and DC Blocked. 6 PA_EN Input enable bias voltage (Regulated internally) 7 GND Ground connection. 8 RX RF output from the low noise amplifier or bypass. Internally matched to 50 Ω and DC blocked. 9 LNA_EN LNA enable bias voltage 10 VCC LNA and regulator supply voltage 11 NC No electrical connection. It may be left floating or connected to ground. 12 GND Ground connection. 13 NC No electrical connection. It may be left floating or connected to ground. 14 NC No electrical connection. It may be left floating or connected to ground. 15 GND Ground connection. 16 ANT RF bi-directional antenna port. Internally matched to 50 Ω. An external DC block is required. Backside Paddle GND RF/DC ground. Use recommended via pattern to minimize inductance and thermal resistance. See PCB Mounting Pattern for suggested footprint. ADVANCED |
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