AD9054A datasheet(6/21 Pages) AD

Part #	AD9054A

Description	A/D Converter

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AD9054A

–5–

REV. D

AIN

D7–D0

ENCODE

SAMPLE N–1

SAMPLE N

SAMPLE N+3

SAMPLE N+4

SAMPLE N+2

SAMPLE N+1

tA

tEH

tEL

1/fS

tPD

tV

DATA N

DATA N–1

DATA N–2

DATA N–3

DATA N–4

DATA N–5

Figure 1. Timing—Single Channel Mode

PIN FUNCTION DESCRIPTIONS

Pin Number

Mnemonic

Function

1

ENCODE

Encode Clock for ADC (ADC

Samples on Rising Edge

of ENCODE)

2

ENCODE

Encode Clock Complement

(ADC Samples on Falling Edge

of

ENCODE)

3, 5, 15, 18, 28,

VDD

Power Supply (5 V)

30, 31, 36, 41

4, 6, 16, 17, 27,

GND

Ground

29, 32, 35, 37, 40

14–7

DA0–DA7

Digital Outputs of ADC Channel

A. DA7 is the MSB, DA0 the LSB

19–26

DB0–DB7

Digital Outputs of ADC Channel

B. DB7 is the MSB, DB0 the LSB

33

VREF OUT

Internal Reference Output

(2.5 V typical); Bypass with

0.1

µF to Ground

34

VREF IN

Reference Input for ADC (2.5 V

typical,

±4%)

38

AIN

Analog Input—Complement.

Connect to input signal midscale

reference.

39

AIN

Analog Input—True

42

DEMUX

Format Select. LOW = Dual.

Channel Mode, HIGH = Single.

Channel Mode (Channel A Only)

43

DS

Data Sync Complement

44

DS

Data Sync—Aligns Output Chan-

nels in Dual-Channel Mode

PIN CONFIGURATION

PIN 1

IDENTIFIER

TOP VIEW

(PINS DOWN)

DB1

DB2

DB3

GND

DA2

DA1

DA0 (LSB)

VDD

GND

VDD

DB0 (LSB)

DS

DEMUX

VDD

GND

AIN

GND

VDD

GND

VREF IN

AD9054A

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