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SM561
Document #: 38-07021 Rev. *C
Page 4 of 8
Absolute Maximum Ratings[1]
Supply Voltage (VDD): .................................... –0.5V to +6.0V
DC Input Voltage: ...................................–0.5V to VDD + 0.5V
Junction Temperature .................................–40°C to +140°C
Operating Temperature:...................................... 0°C to 70°C
Storage Temperature .................................. –65°C to +150°C
Static Discharge Voltage(ESD) ........................... 2,000V–Min
DC Electrical Characteristics (VDD = 3.3V, Temp. = 25°C and CL (pin 4) = 15 pF, unless otherwise noted)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
VDD
Power Supply Range
± 10%
2.97
3.3
3.63
V
VINH
Input High Voltage
S0 and S1 only
0.85VDD
VDD
VDD
V
VINM
Input Middle Voltage
S0 and S1 only
0.40VDD
0.50VDD
0.60VDD
V
VINL
Input Low Voltage
S0 and S1 only
0.0
0.0
0.15VDD
V
VOH1
Output High Voltage
IOH = 6 ma
2.4
V
VOH2
Output High Voltage
IOH = 20 ma
2.0
V
VOL1
Output Low Voltage
IOH = 6 ma
0.4
V
VOL2
Output Low Voltage
IOH = 20 ma
1.2
V
Cin1
Input Capacitance
Xin/CLK (pin 1)
3
4
5
pF
Cin2
Input Capacitance
Xout (pin 8)
6
8
10
pF
Cin2
Input Capacitance
S0, S1, SSCC (pins 7, 6, 5)
3
4
5
pF
IDD1
Power Supply Current
FIN = 65 MHz
35
45
mA
IDD2
Power Supply Current
FIN = 166 MHz
50
55
mA
Electrical Timing Characteristics (VDD = 3.3V, T = 25°C and CL=15 pF, unless otherwise noted)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
ICLKFR
Input Clock Frequency
Range
VDD = 3.30V
54
166
MHz
Trise
Clock Rise Time (pin 4)
SSCLK1 @ 0.4 – 2.4V
1.2
1.4
1.6
ns
Tfall
Clock Fall Time (pin 4)
SSCLK1 @ 0.4 – 2.4V
1.2
1.4
1.6
ns
DTYin
Input Clock Duty Cycle
XIN/CLK (pin 1)
20
50
80
%
DTYout
Output Clock Duty Cycle
SSCLK1 (pin 4)
45
50
55
%
JCC1
Cycle-to-Cycle Jitter
Fin = 140 MHz
–
125
175
ps
JCC2
Cycle-to-Cycle Jitter
Fin = 140 MHz
–
150
200
ps
Note:
1.
Single Power Supply: The Voltage on any input or I/O pin cannot exceed the power pin during power up
.
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