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ST72F324L Datasheet(PDF) 10 Page - STMicroelectronics |
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ST72F324L Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 151 page ST72F324L, ST72324BL 10/151 Notes: 1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating interrupt input. 2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD 25 10 13 PC2 (HS)/ICAP2_B I/O CT HS X X X X Port C2 Timer B Input Capture 2 26 11 14 PC3 (HS)/ICAP1_B I/O CT HS X X X X Port C3 Timer B Input Capture 1 27 12 15 PC4/MISO/ICCDA- TA I/O CT X XX X Port C4 SPI Master In / Slave Out Data ICC Data In- put 28 13 16 PC5/MOSI/AIN14 I/O CT X XX X X Port C5 SPI Master Out / Slave In Data ADC Analog Input 14 29 14 17 PC6/SCK/ICCCLK I/O CT X XX X Port C6 SPI Serial Clock ICC Clock Output 30 15 18 PC7/SS/AIN15 I/O CT X XX X X Port C7 SPI Slave Select (ac- tive low) ADC Analog Input 15 31 16 19 PA3 (HS) I/O CT HS X ei0 X X Port A3 32 VDD_1 S Digital Main Supply Voltage 33 VSS_1 S Digital Ground Voltage 34 17 20 PA4 (HS) I/O CT HS X XX X Port A4 35 PA5 (HS) I/O CT HS X XX X Port A5 36 18 21 PA6 (HS) I/O CT HS X TPort A6 1) 37 19 22 PA7 (HS) I/O CT HS X TPort A7 1) 38 20 23 VPP /ICCSEL I Must be tied low. In the flash pro- gramming mode, this pin acts as the programming voltage input VPP. See Section 12.9.2 for more details. High voltage must not be applied to ROM devices. 39 21 24 RESET I/O CT Top priority non maskable interrupt. 40 22 25 VSS_2 S Digital Ground Voltage 41 23 26 OSC2 O Resonator oscillator inverter output 42 24 27 OSC1 I External clock input or Resonator os- cillator inverter input 43 25 28 VDD_2 S Digital Main Supply Voltage 44 26 29 PE0/TDO I/O CT X X X X Port E0 SCI Transmit Data Out 1 27 30 PE1/RDI I/O CT X X X X Port E1 SCI Receive Data In 2 28 31 PB0 I/O CT X ei2 X X Port B0 3 PB1 I/O CT X ei2 X X Port B1 4 PB2 I/O CT X ei2 X X Port B2 5 29 32 PB3 I/O CT X ei2 X X Port B3 Pin n° Pin Name Level Port Main function (after reset) Alternate Function Input Output 1 |
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