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STK12C68-5K40M Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers

Part No. STK12C68-5K40M
Description  CMOS NV SRAM 8K X 8 AUTOSTORE NONVOLATILE STATIC RAM
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STK12C68-M
4-56
#1
#2
Alt.
MIN
MAX
MIN
MAX
MIN
MAX
12
tAVAV
tAVAV
tWC
Write Cycle Time
35
45
55
ns
13
t
WLWH
t
WLEH
t
WP
Write Pulse Width
30
35
45
ns
14
t
ELWH
t
ELEH
t
CW
Chip Enable to End of Write
30
35
45
ns
15
tDVWH
tDVEH
tDW
Data Set-up to End of Write
18
20
25
ns
16
tWHDX
tEHDX
tDH
Data Hold After End of Write
0
0
0
ns
17
tAVWH
tAVEH
tAW
Address Set-up to End of Write
30
35
45
ns
18
tAVWL
tAVEL
tAS
Address Set-up to Start of Write
0
0
0
ns
19
t
WHAX
t
EHAX
t
WR
Address Hold After End of Write
0
0
0
ns
20
t
WLQZ
h,j
t
WZ
Write Enable to Output Disable
17
20
25
ns
21
tWHQX
tOW
Output Active After End of Write
5
5
5
ns
WRITE CYCLE #1: W CONTROLLED i
WRITE CYCLE #2: E CONTROLLED i
WRITE CYCLES #1 & #2
PREVIOUS DATA
ADDRESS
E
W
DATA IN
DATA OUT
DATA VALID
HIGH IMPEDANCE
12
tAVAV
14
tELWH
19
tWHAX
17
tAVWH
18
tAVWL
13
tWLWH
15
tDVWH
16
tWHDX
20
tWLQZ
21
tWHQX
ADDRESS
E
W
DATA IN
DATA OUT
HIGH IMPEDANCE
DATA VALID
12
tAVAV
18
tAVEL
14
tELEH
19
tEHAX
17
tAVEH
13
tWLEH
15
tDVEH
16
tEHDX
SYMBOLS
STK12C68-40M
STK12C68-45M
STK12C68-55M
NO.
PARAMETER
UNITS
Note h: Measured
Ā±200mV from steady state output voltage.
Note i:
E or W must be
ā‰„ V
IH during address transitions.
Note j:
If W is low when E goes low, the outputs remain in the high impedance state.
(V
CC = 5.0V Ā± 10%)
d




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