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STK12C68-5K55M Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

Part No. STK12C68-5K55M
Description  CMOS NV SRAM 8K X 8 AUTOSTORE NONVOLATILE STATIC RAM
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STK12C68-M
4-55
NO.
PARAMETER
UNITS
1tELQV
tACS
Chip Enable Access Time
40
45
55
ns
2tAVAV
tRC
Read Cycle Time
40
45
55
ns
3tAVQV
g
tAA
Address Access Time
40
45
55
ns
4t
GLQV
t
OE
Output Enable to Data Valid
20
25
35
ns
5t
AXQX
t
OH
Output Hold After Address Change
5
5
5
ns
6tELQX
tLZ
Chip Enable to Output Active
5
5
5
ns
7tEHQZ
h
tHZ
Chip Disable to Output Inactive
17
20
25
ns
8tGLQX
tOLZ
Output Enable to Output Active
0
0
0
ns
9tGHQZ
h
tOHZ
Output Disable to Output Inactive
17
20
25
ns
10
t
ELICCH
e
t
PA
Chip Enable to Power Active
0
0
0
ns
11
t
EHICCL
c,e
t
PS
Chip Disable to Power Standby
35
45
55
ns
READ CYCLES #1 & #2
READ CYCLE #1 f,g
DQ (Data Out)
ADDRESS
DATA VALID
2
tAVAV
3
tAVQV
5
tAXQX
SRAM MEMORY OPERATION
ADDRESS
E
G
DQ (Data Out)
DATA VALID
2
tAVAV
1
tELQV
6
tELQX
4
tGLQV
8
tGLQX
10
tELICCH
11
tEHICCL
7
tEHQZ
9
tGHQZ
ICC
ACTIVE
STANDBY
READ CYCLE #2 f
#1, #2
Alt.
MIN
MAX
MIN
MAX
MIN
MAX
SYMBOLS
STK12C68-40M
STK12C68-45M
STK12C68-55M
Note c: Bringing E
≥V
IH will not produce standby currents until any nonvolatile cycle in progress has timed out. See MODE SELECTION table.
Note e: Parameter guaranteed but not tested.
Note f: For READ CYCLE #1 and #2, W is high for entire cycle.
Note g: Device is continuously selected with E low and G low.
Note h: Measured
± 200mV from steady state output voltage.
(VCC = 5.0V ± 10%)
d




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