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COP8780CJ Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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COP8780CJ Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 28 page Functional Description (Continued) TLDD11299 – 11 FIGURE 8 MICROWIREPLUS Application bit in the CNTRL register enables the SO and SK functions on the G Port The SK pin must be selected as an input and the SO pin selected as an output pin by appropriately setting up the Port G configuration register Table V summarizes the settings required to enter the Slave mode of operation The user must set the BUSY flag immediately upon entering the Slave mode This will ensure that all data bits sent by the Master will be shifted properly After eight clock pulses the BUSY flag will be cleared and the sequence may be repeated (Figure 8) TABLE V G4 G5 G4 G5 G6 Config Config Fun Fun Fun Operation Bit Bit 1 1 SO Int SK SI MICROWIRE Master 0 1 TRI-STATE Int SK SI MICROWIRE Master 1 0 SO Ext SK SI MICROWIRE Slave 0 0 TRI-STATE Ext SK SI MICROWIRE Slave TIMERCOUNTER The device has a powerful 16-bit timer with an associated 16-bit register enabling it to perform extensive timer func- tions The timer T1 and its register R1 are each organized as two 8-bit readwrite registers Control bits in the register CNTRL allow the timer to be started and stopped under software control The timer-register pair can be operated in one of three possible modes Table VI details various timer operating modes and their requisite control settings MODE 1 TIMER WITH AUTO-LOAD REGISTER In this mode of operation the timer T1 counts down at the instruction cycle rate Upon underflow the value in the regis- ter R1 gets automatically reloaded into the timer which con- tinues to count down The timer underflow can be pro- grammed to interrupt the microcontroller A bit in the control register CNTRL enables the TIO (G3) pin to toggle upon timer underflows This allows the generation of square-wave outputs or pulse width modulated outputs under software control (Figure 9) MODE 2 EXTERNAL COUNTER In this mode the timer T1 becomes a 16-bit external event counter The counter counts down upon an edge on the TIO pin Control bits in the register CNTRL program the counter to decrement either on a positive edge or on a negative edge Upon underflow the contents of the register R1 are automatically copied into the counter The underflow can also be programmed to generate an interrupt (Figure 9) MODE 3 TIMER WITH CAPTURE REGISTER Timer T1 can be used to precisely measure external fre- quencies or events in this mode of operation The timer T1 counts down at the instruction cycle rate Upon the occur- rence of a specified edge on the TIO pin the contents of the timer T1 are copied into the register R1 Bits in the control register CNTRL allow the trigger edge to be specified either as a positive edge or as a negative edge In this mode the user can elect to be interrupted on the specified trigger edge (Figure 10) TABLE VI Timer Operating Modes CNTRL Timer Bits Operation Mode T Interrupt Counts 765 On 0 0 0 External Counter wAuto-Load Reg Timer Underflow TIO Pos Edge 0 0 1 External Counter wAuto-Load Reg Timer Underflow TIO Neg Edge 0 1 0 Not Allowed Not Allowed Not Allowed 0 1 1 Not Allowed Not Allowed Not Allowed 1 0 0 Timer wAuto-Load Reg Timer Underflow tc 1 0 1 Timer wAuto-Load RegToggle TIO Out Timer Underflow tc 1 1 0 Timer wCapture Register TIO Pos Edge tc 1 1 1 Timer wCapture Register TIO Neg Edge tc http www nationalcom 9 |
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