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HD6473048 Datasheet(PDF) 11 Page - Hitachi Semiconductor |
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HD6473048 Datasheet(HTML) 11 Page - Hitachi Semiconductor |
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11 / 867 page  13.2.6 Serial Control Register (SCR) ........................................................................ 447 13.2.7 Serial Status Register (SSR) ........................................................................... 451 13.2.8 Bit Rate Register (BRR) ................................................................................. 455 13.3 Operation ........................................................................................................................ 464 13.3.1 Overview......................................................................................................... 464 13.3.2 Operation in Asynchronous Mode.................................................................. 466 13.3.3 Multiprocessor Communication ..................................................................... 475 13.3.4 Synchronous Operation .................................................................................. 482 13.4 SCI Interrupts.................................................................................................................. 491 13.5 Usage Notes .................................................................................................................... 492 Section 14 Smart Card Interface ................................................................................ 497 14.1 Overview......................................................................................................................... 497 14.1.1 Features........................................................................................................... 497 14.1.2 Block Diagram................................................................................................ 498 14.1.3 Input/Output Pins............................................................................................ 499 14.1.4 Register Configuration.................................................................................... 499 14.2 Register Descriptions...................................................................................................... 500 14.2.1 Smart Card Mode Register (SCMR)............................................................... 500 14.2.2 Serial Status Register (SSR) ........................................................................... 501 14.2.3 Serial Mode Register (SMR) .......................................................................... 503 14.2.4 Serial Control Register (SCR) ........................................................................ 504 14.3 Operation ........................................................................................................................ 505 14.3.1 Overview......................................................................................................... 505 14.3.2 Pin Connections .............................................................................................. 505 14.3.3 Data Format .................................................................................................... 506 14.3.4 Register Settings ............................................................................................. 508 14.3.5 Clock............................................................................................................... 510 14.3.6 Transmitting and Receiving Data ................................................................... 512 14.4 Usage Notes .................................................................................................................... 519 Section 15 A/D Converter............................................................................................ 523 15.1 Overview......................................................................................................................... 523 15.1.1 Features........................................................................................................... 523 15.1.2 Block Diagram................................................................................................ 524 15.1.3 Input Pins ........................................................................................................ 525 15.1.4 Register Configuration.................................................................................... 526 15.2 Register Descriptions...................................................................................................... 527 15.2.1 A/D Data Registers A to D (ADDRA to ADDRD) ........................................ 527 15.2.2 A/D Control/Status Register (ADCSR) .......................................................... 528 15.2.3 A/D Control Register (ADCR) ....................................................................... 531 |
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