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IDT79RV4700-80-GH Datasheet(PDF) 3 Page - Integrated Device Technology |
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IDT79RV4700-80-GH Datasheet(HTML) 3 Page - Integrated Device Technology |
3 / 25 page 3 of 25 April 10, 2001 IDT79R4700 Figure 3 RC4700 Pipeline Stages I0 1I 2I 1R 2R 1A 2A 1D 2D 1W 2W I1 1I 2I 1R 2R 1A 2A 1D 2D 1W 2W I2 1I 2I 1R 2R 1A 2A 1D 2D 1W ••• I3 1I 2I 1R 2R 1A 2A 1D ••• I4 1I 2I 1R 2R 1A ••• one cycle Key to Figure 1I-1R Instruction cache access 2I Instruction virtual-to-physical address translation in ITLB 2A-2D Data cache access and load align 1D Data virtual-to-physical address translation in DTLB 1D-2D Virtual-to-physical address translation in JTLB 2R Register file read 2R Bypass calculation 2R Instruction decode 2R Branch address calculation 1A Issue or slip decision 1A-2A Integer add, logical, shift 1A Data virtual address calculation 2A Store align 1A Branch decision 2W Register file write |
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