FOD8334R2 datasheet(11/35 Pages) ONSEMI

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FOD8334R2 Datasheet(PDF) 11 Page - ON Semiconductor

11 / 35 page

FOD8334 Rev. 1.0

www.fairchildsemi.com

22. The time from DESAT threshold is exceeded until the FAULT output goes LOW.

23. The length of time the DESAT threshold must be exceeded before VO begins to go LOW and the FAULT output

begins to go LOW.

24. The length of time from when RESET is initiated (via IF turn-on) until FAULT output goes HIGH.

25. The UVLO turn-on delay, tUVLO ON, is measured from the VUVLO+ threshold level of the rising edge of the output

supply voltage (VDD) to the 5 V level of the rising edge of the VO signal.

26. The UVLO turn-off delay, tUVLO OFF, is measured from the VUVLO– threshold level of the falling edge of the output

supply voltage (VDD) to the 5 V level of the falling edge of the VO signal.

27. The time to good power, tGP, is measured from the VUVLO+ threshold level of the rising edge of the output supply

voltage (VDD) to the 5 V level of the rising edge of the VO signal.

28. Common-mode transient immunity at output HIGH state is the maximum tolerable negative dVCM/ dt on the trailing

edge of the common-mode pulse, VCM, to assure the output remains in HIGH state (i.e., VO > 15 V or VFAULT > 2 V).

29. Common-mode transient immunity at output LOW state is the maximum positive tolerable dVCM/ dt on the leading

edge of the common-mode pulse, VCM, to ensure the output remains in LOW state (i.e., VO < 1.0 V or

VFAULT < 0.8 V).

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