IS61LV12816

10

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

11/30/00

DATA UNDEFINED

ADDRESS 1

ADDRESS 2

HIGH-Z

WORD 1

LOW

WORD 2

UB_CEWR4.eps

ADDRESS

CE

UB, LB

WE

OE

VALID

VALID

Notes:

1. The internal Write time is defined by the overlap of

CE = LOW, UB and/or LB = LOW, and WE = LOW. All signals must be

in valid states to initiate a Write, but any can be deasserted to terminate the Write. The

referenced to the rising or falling edge of the signal that terminates the Write.

2. Tested with

OE HIGH for a minimum of 4 ns before WE = LOW to place the I/O in a HIGH-Z state.

3.

WE may be held LOW across many address cycles and the LB, UB pins can be used to control the Write function.