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M28R400CT120ZB1T Datasheet(PDF) 11 Page - STMicroelectronics |
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M28R400CT120ZB1T Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 48 page  11/48 M28R400CT, M28R400CB pears to start but will terminate, leaving the data unchanged. No error condition is given when pro- tected blocks are ignored. During the erase operation the memory will only accept the Read Status Register command. All other commands will be ignored, including the Erase Suspend command. It is not possible to is- sue any command to abort the operation. Chip Erase commands should be limited to a max- imum of 100 Program/Erase cycles. After 100 Pro- gram/Erase cycles the internal algorithm will still operate properly but some degradation in perfor- mance may occur. Typical chip erase times are given in Table 7. Program Command The memory array can be programmed word-by- word. Two bus write cycles are required to issue the Program Command. ■ The first bus cycle sets up the Program command. ■ The second latches the Address and the Data to be written and starts the Program/Erase Controller. During Program operations the memory will ac- cept the Read Status Register command and the Program/Erase Suspend command. Typical Pro- gram times are given in Table 7., Program, Erase Times and Program/Erase Endurance Cycles. Programming aborts if Reset goes to VIL. As data integrity cannot be guaranteed when the program operation is aborted, the block containing the memory location must be erased and repro- grammed. See APPENDIX C., Figure 15., Program Flow- chart and Pseudo Code, for the flowchart for using the Program command. Double Word Program Command This feature is offered to improve the programming throughput, writing a page of two adjacent words in parallel.The two words must differ only for the address A0. Programming should not be attempt- ed when VPP is not at VPPH. The command can be executed if VPP is below VPPH but the result is not guaranteed. Three bus write cycles are necessary to issue the Double Word Program command. ■ The first bus cycle sets up the Double Word Program Command. ■ The second bus cycle latches the Address and the Data of the first word to be written. ■ The third bus cycle latches the Address and the Data of the second word to be written and starts the Program/Erase Controller. Read operations output the Status Register con- tent after the programming has started. Program- ming aborts if Reset goes to VIL. As data integrity cannot be guaranteed when the program opera- tion is aborted, the block containing the memory location must be erased and reprogrammed. See APPENDIX C., Figure 16., Double Word Pro- gram Flowchart and Pseudo Code, for the flow- chart for using the Double Word Program command. Clear Status Register Command The Clear Status Register command can be used to reset bits 1, 3, 4 and 5 in the Status Register to ‘0’. One bus write cycle is required to issue the Clear Status Register command. The bits in the Status Register do not automatical- ly return to ‘0’ when a new Program or Erase com- mand is issued. The error bits in the Status Register should be cleared before attempting a new Program or Erase command. Program/Erase Suspend Command The Program/Erase Suspend command is used to pause a Program or Erase operation. One bus write cycle is required to issue the Program/Erase command and pause the Program/Erase control- ler. During Program/Erase Suspend the Command In- terface will accept the Program/Erase Resume, Read Array, Read Status Register, Read Electron- ic Signature and Read CFI Query commands. Ad- ditionally, if the suspend operation was Erase then the Program, Block Lock, Block Lock-Down or Protection Program commands will also be ac- cepted. The block being erased may be protected by issuing the Block Protect, Block Lock or Protec- tion Program commands. When the Program/ Erase Resume command is issued the operation will complete. Only the blocks not being erased may be read or programmed correctly. During a Program/Erase Suspend, the device can be placed in a pseudo-standby mode by taking Chip Enable to VIH. Program/Erase is aborted if Reset turns to VIL. See APPENDIX C., Figure 17., Program Suspend & Resume Flowchart and Pseudo Code, and Fig- ure 19., Erase Suspend & Resume Flowchart and Pseudo Code, for flowcharts for using the Pro- gram/Erase Suspend command. Program/Erase Resume Command The Program/Erase Resume command can be used to restart the Program/Erase Controller after a Program/Erase Suspend operation has paused it. One Bus Write cycle is required to issue the command. Once the command is issued subse- quent Bus Read operations read the Status Reg- ister. See APPENDIX C., Figure 17., Program Suspend & Resume Flowchart and Pseudo Code, and Fig- |
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