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TPS71257 Datasheet(PDF) 9 Page - Texas Instruments

Part # TPS71257
Description  Dual 250 mA Output, UltraLow Noise, High PSRR, Low-Dropout Linear Regulator
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS71257 Datasheet(HTML) 9 Page - Texas Instruments

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APPLICATION INFORMATION
OUTPUT NOISE
TPS712xx
GND
EN2
NR
IN
OUT1
EN1
OUT2
V
IN
V
OUT1
V
OUT2
0.1
µF
2.2
µF
2.2
µF
0.01
µF
INPUT AND OUTPUT CAPACITOR
STARTUP CHARACTERISITCS
TPS71202, TPS71219
TPS71229, TPS71247
TPS71256, TPS71257
SBVS049B – MAY 2004 – REVISED MARCH 2005
1.8 V or less is chosen, the minimum recommended
The TPS712xx family of dual low-dropout (LDO)
output capacitor is 4.7 µF. Any ceramic capacitor that
regulators
has
been
optimized
for
use
in
meets the minimum output capacitor requirements is
noise-sensitive battery-operated equipment. The de-
suitable. Capacitors with higher ESR may be used,
vice features extremely low dropout, high PSRR,
provided the ESR is less than 1
Ω.
ultralow output noise, and low quiescent current
(190 µA typical per channel). When both outputs are
disabled, the supply currents are reduced to less than
2µA. A typical application circuit is shown in Fig-
The internal voltage reference is a key source of
ure 24.
noise in an LDO regulator. The TPS712xx has an NR
pin that is connected to the voltage reference through
a 250 k
Ω internal resistor. The 250 kΩ internal
resistor, in conjunction with an external ceramic
bypass capacitor connected to the NR pin, creates a
low-pass filter to reduce the voltage reference noise
and, therefore, the noise at the regulator output. To
achieve a fast startup, the 250 k
Ω internal resistor is
shorted for 400 µs after the device is enabled.
Because the primary noise source is the internal
voltage reference, the output noise will be greater for
higher output voltage versions. For the case where
no noise reduction capacitor is used, the typical noise
Figure 24. Typical Application Circuit
(µVrms) over 10 Hz to 100 kHz is 80 times the output
(fixed-voltage versions)
voltage. If a 0.01 µF capacitor is used from the NR
pin to ground, the noise (µVrms) drops to 11.8 times
the output voltage. For example, the TPS71256
exhibits only 33 µVrms of output voltage noise using
REQUIREMENTS
a 0.01 µF ceramic bypass capacitor and a 2.2 µF
ceramic output capacitor.
A 0.1 µF or larger ceramic input bypass capacitor,
connected between IN and GND and located close to
the TPS712xx, is required for stability. It improves
transient response, noise rejection, and ripple rejec-
To minimize startup overshoot, the TPS712xx will
tion. A higher-value input capacitor may be necessary
initially target an output voltage that is approximately
if large, fast-rise-time load transients are anticipated
80% of the final value. To avoid a delayed startup
and the device is located several inches from the
time, noise reduction capacitors of 0.01 µF or less
power source.
are recommended. Larger noise reduction capacitors
The TPS712xx requires an output capacitor connec-
will cause the output to hold at 80% until the voltage
ted between the outputs and GND to stabilize the
on the noise reduction capacitor exceeds 80% of the
internal control loops. The minimum recommended
bandgap voltage. The typical startup time with a
output capacitor is 2.2 µF. If an output voltage of
0.001 µF noise reduction capacitor is 60 µs. Once
one of the output voltages is present, the startup time
of the other output will not be affected by the noise
reduction capacitor.
9


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