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CY25823 Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY25823
Description  CK-SSCD Spread Spectrum Differential Clock Specification
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY25823 Datasheet(HTML) 3 Page - Cypress Semiconductor

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CY25823
Document #: 38-07579 Rev. *C
Page 3 of 12
11:18
Command Code – 8 bits
'00000000' stands for block operation
11:18
Command Code – 8 bits
'00000000' stands for block operation
19
Acknowledge from slave
19
Acknowledge from slave
20:27
Byte Count – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29:36
Data byte 0 – 8 bits
28
Read = 1
37
Acknowledge from slave
29
Acknowledge from slave
38:45
Data byte 1 – 8 bits
30:37
Byte count from slave – 8 bits
46
Acknowledge from slave
38
Acknowledge
....
......................
39:46
Data byte from slave – 8 bits
....
Data Byte (N–1) –8 bits
47
Acknowledge
....
Acknowledge from slave
48:55
Data byte from slave – 8 bits
....
Data Byte N –8 bits
56
Acknowledge
....
Acknowledge from slave
....
Data bytes from slave/Acknowledge
....
Stop
....
Data byte N from slave – 8 bits
....
Not Acknowledge
....
Stop
Table 3. Byte Read and Byte Write Protocol
Byte Write Protocol
Byte Read Protocol
Bit
Description
Bit
Description
1Start
1Start
2:8
Slave address – 7 bits (D4)
2:8
Slave address – 7 bits (D5)
9
Write = 1
9
Read = 1
10
Acknowledge from slave
10
Acknowledge from slave
11:18
Command Code – 8 bits
'100000xx' stands for byte operation, bits[1:0] of
the command code represents the offset of the
byte to be accessed
11:18
Command Code – 8 bits
'100000xx' stands for byte operation, bits[1:0]
of the command code represents the offset of
the byte to be accessed
19
Acknowledge from slave
19
Acknowledge from slave
20:27
Data byte from master – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29
Stop
28
Read = 1
29
Acknowledge from slave
30:37
Data byte from slave – 8 bits
38
Not Acknowledge
39
Stop
Byte 0: Control Register
Bit
@Power-up
Pin#
Name
Pin Description
7
0
11, 12
SS0
6
S1
11, 12
SS1
5
S2
11, 12
SS2
4
S3
11, 12
SS3
3
SEL100/96#
6
SEL100/96#
Select output frequency, 1 = 100 MHz, 0 = 96 MHz
Table 2. Block Read and Block Write Protocol (continued)
Block Write Protocol
Block Read Protocol
Bit
Description
Bit
Description


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