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AD1992 Datasheet(PDF) 10 Page - Analog Devices |
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AD1992 Datasheet(HTML) 10 Page - Analog Devices |
10 / 16 page AD199x Preliminary Technical Data Rev. PrA – 1/20/05 | Page 10 of 16 FUNCTIONAL DESCRIPTION DEVICE ARCHITECTURE The AD199x is an audio quality, switching amplifier with an integrated sigma-delta modulator. The power stage of the AD199x is arranged internally as four transistor pairs, which are used as two H-bridge outputs to provide stereo amplification. The transistor pairs are driven by the output of the ∑∆ modulator. A user selectable non-overlap time is provided between the switching of the high side transistor and low side transistor to ensure that both transistors are never on at the same time. The AD199x implements turn on pop suppression to eliminates any pops or clicks following a reset or un-mute. Analog Input Section The analog input section uses an internal amplifier to bias the input signal to the reference level. A DC blocking capacitor should be connected as shown in Figure 15 to remove any external DC bias contained in the input signal 1.25V AINL/ AINR 0V + 71046-0007 Figure 15. Normal Operation The Sigma-Delta Modulator Detailed description pending on patents pending, as well as announcements, conference proceedings and other scheduled public disclosures. Selecting Stereo or Mono Mode Driving the H-Bridge Each channel of the switching amplifier is controlled by a 4 transistor H-bridge to give a differential output stage. The outputs of the H-bridges, OUTR+, OUTR-, OUTL+ and OUTL- will switch between PVDD and PGND as determined by the sigma delta modulator. The power supply that is used to drive the power stage of the AD199x should be typically in the range of +8 V to +20 V and should be capable of supplying enough current to drive the load. This power supply is connected across the PVDD and PGND pins. The feedback pins, NFR+, NFR-, NFL+ and NFL-, are used to supply negative feedback to the modulator. The pins are connected to the outputs of the H-bridge via a resister divider network as shown in Figure 16. See the section on Selecting the Modulator Gain for more information. External schottky diodes can be used to reduce power loss during the non-overlap time when neither of the high-side or low-side transistors is on. During this time neither transistor is driving the OUTx pin. The nature of the inductors is to keep current flowing. For example the OUTx pin may approach and pass the PGND level to achieve this. When the voltage at the OUTx pin is 0.7V below PGND the parasitic diode associated with the low-side transistor will become forward biased and turn on. When the high-side transistor turns on the voltage at OUTx will rise to PVDD and will reverse bias the parasitic diode. However, by its nature the parasitic diode has a long reverse recovery time and current will continue to flow through it to PGND thus causing the entire circuit to draw more current than necessary. The addition of the schottky diodes prevents this happening. When the OUTx pin goes more than 0.3V below PGND the schottky diode becomes forward biased. When the high-side transistor turns on the schottky diode becomes reverse biased. The reverse recovery time of the schottky diode is significantly faster than the parasitic diode so far less current is wasted. A similar effect happens when the inductor induces a current which drives the OUTx pin above PVDD. Figure 16 shows how the external components of a system are connected to the pins of the AD199x to form the H- bridge configuration. AMPLIFIER GAIN Selecting the Modulator Gain The AD199x modulator can be thought of as a switching analog amplifier with a voltage gain controlled by two external resistors forming a resistor divider between the OUTxx pins and PGND. The centre of the resistor divider is connected to the appropriate feedback pin NFx. Selecting the gain along with the PVDD Voltage will determine how much power can be delivered to a load for a fixed input signal. The gain of the modulator is controlled by the values of R1 and R2 (see Figure 16) according to the equation below. Gain = (R1 + R2)/R2 The gain should be selected such that a 1Vrms input signal doesn’t cause the modulator to generate an output signal which has a peak to peak value greater than 90% of PVDD. Selecting a gain that meets this criteria will ensure that the modulator remains in a stable operating condition. PVDD OUTx+ PGND NFx+ OUTx- PGND NFx- 71046-0004 EXTERNAL COMPONENTS D3 D4 PVDD Figure 16. H-Bridge Configuration |
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