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LTC3713EG Datasheet(PDF) 10 Page - Linear Technology |
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LTC3713EG Datasheet(HTML) 10 Page - Linear Technology |
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10 / 24 page  10 LTC3713 3713fa switch cycle, turning on the switch. When the summation of a signal representing switch current and a ramp gen- erator (introduced to avoid subharmonic oscillations at duty factors greater than 50%) exceeds the VC signal, comparator A2 changes state, resetting the flip-flop and turning off the switch. More power is delivered to the output as switch current is increased. The output voltage, attenuated by external resistor divider R7 and R8, appears at the VFB2 pin, closing the overall loop. Frequency com- pensation is provided internally by RC and CC. Transient OPERATIO APPLICATIO S I FOR ATIO A typical LTC3713 application circuit is shown in Figure 1. External component selection is primarily de- termined by the maximum load current and begins with the selection of the sense resistance and power MOSFET switches. The LTC3713 uses the on-resistance of the synchronous power MOSFET for determining the induc- tor current. The desired amount of ripple current and operating frequency largely determines the inductor value. Finally, CIN is selected for its ability to handle the large RMS current into the converter and COUT is chosen with low enough ESR to meet the output voltage ripple and transient specification. Maximum Sense Voltage and VRNG Pin Inductor current is determined by measuring the voltage across a sense resistance that appears between the SENSE+ and SENSE– pins. The maximum sense voltage is set by the voltage applied to the VRNG pin and is equal to approximately (0.133)VRNG. The current mode control loop will not allow the inductor current valleys to exceed (0.133)VRNG/RSENSE. In practice, one should allow some margin for variations in the LTC3713 and external com- ponent values and a good guide for selecting the sense resistance is: R V I SENSE RNG OUT MAX = 10 • () An external resistive divider from INTVCC can be used to set the voltage of the VRNG pin between 0.5V and 2V resulting in nominal sense voltages of 50mV to 200mV. Additionally, the VRNG pin can be tied to SGND or INTVCC in which case the nominal sense voltage defaults to 70mV or 140mV, respectively. The maximum allowed sense voltage is about 1.33 times this nominal value. Connecting the SENSE+ and SENSE– Pins The LTC3713 can be used with or without a sense resistor. When using a sense resistor, it is placed between the source of the bottom MOSFET M2 and ground. Connect the SENSE+ and SENSE– pins as a Kelvin connection to the sense resistor with SENSE+ at the source of the bottom MOSFET and the SENSE – pin to PGND1. Using a sense resistor provides a well defined current limit, but adds cost and reduces efficiency. Alternatively, one can eliminate the sense resistor and use the bottom MOSFET as the current sense element by simply connecting the SENSE+ pin to the drain and the SENSE– pin to the source of the bottom MOSFET. This improves efficiency, but one must carefully choose the MOSFET on-resistance as discussed in a later section. Applications Requiring Symmetric Current Limit The ITH voltage has a range of 0V to 2.4V with 0.8V corresponding to 0A. In applications in which the output will only be sourcing current, this allows the output to sink one third of the maximum source current. For applications in which the output will be sourcing and sinking current, it might be desirable to have a symmetrical output current response can be optimized by the addition of a phase lead capacitor CPL in parallel with R7 in applications where large value or low ESR output capacitors are used. As the load current is decreased, the switch turns on for a shorter period each cycle. If the load current is further decreased, the boost converter will skip cycles to main- tain output voltage regulation. If the VFB2 pin voltage is increased significantly above 1.23V, the boost converter will enter a low power state. |
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