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M25P64-VMF6P Datasheet(PDF) 11 Page - STMicroelectronics |
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M25P64-VMF6P Datasheet(HTML) 11 Page - STMicroelectronics |
11 / 38 page 11/38 M25P64 MEMORY ORGANIZATION The memory is organized as: ■ 8388608 bytes (8 bits each) ■ 128 sectors (512Kbits, 65536 bytes each) ■ 32768 pages (256 bytes each). Each page can be individually programmed (bits are programmed from 1 to 0). The device is Sector or Bulk Erasable (bits are erased from 0 to 1) but not Page Erasable. Figure 8. Block Diagram AI08520 HOLD S W Control Logic High Voltage Generator I/O Shift Register Address Register and Counter 256 Byte Data Buffer 256 Bytes (Page Size) X Decoder Size of the read-only memory area C D Q Status Register 00000h 7FFFFFh 000FFh |
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