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P87C654X2FA Datasheet(PDF) 10 Page - NXP Semiconductors |
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P87C654X2FA Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 88 page Philips Semiconductors Product data P83C654X2/P87C654X2 80C51 8-bit microcontroller family 16 kB OTP/ROM, 256B RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz) 2004 Apr 20 10 CLOCK CONTROL REGISTER (CKCON) This device allows control of the 6-clock/12-clock mode by means of both an SFR bit (X2) and an OTP bit. The OTP clock control bit OX2, when programmed (6-clock mode), supersedes the X2 bit (CKCON.0). The CKCON register is shown below in Figure 1. X2 BIT SYMBOL FUNCTION CKCON.7 – Reserved. CKCON.6 Reserved. CKCON.5 Reserved. CKCON.4 Reserved. CKCON.3 Reserved. CKCON.2 Reserved. CKCON.1 Reserved. CKCON.0 X2 CPU clock; 1 = 6 clocks for each machine cycle, 0 = 12 clocks for each machine cycle SU01689 – – Not Bit Addressable CKCON Address = 8Fh Reset Value = x0000000B 76 54 321 0 –– – – – Figure 1. Clock control (CKCON) register Also please note that the clock divider applies to the serial port for modes 0 and 2 (fixed baud rate modes). This is because modes 1 and 3 (variable baud rate modes) use either Timer 1 or Timer 2. Below is the truth table for the CPU clock mode. Table 1. OX2 clock mode bit (can only be set by parallel programmer) X2 bit (CKCON.0) CPU clock mode erased 0 12-clock mode (default) erased 1 6-clock mode programmed X 6-clock mode |
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