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ATWILC1000B-MUT Datasheet(PDF) 20 Page - ATMEL Corporation |
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ATWILC1000B-MUT Datasheet(HTML) 20 Page - ATMEL Corporation |
20 / 38 page ATWILC1000B-MUT [DATASHEET] Atmel-42491B-ATWILC1000B-MUT_Datasheet_03/2016 2 0 20 8 External Interfaces ATWILC1000B external interfaces include: I2C Slave for control SPI Slave and SDIO Slave for control and data transfer SPI Master for external Flash I2C Master for external EEPROM Two UARTs for debug, control, and data transfer General Purpose Input/Output (GPIO) pins Wi-Fi/Bluetooth coexistence interface With the exception of the SPI Slave and SDIO Slave host interfaces, which are selected using the dedicated SDIO_SPI_CFG pin, the other interfaces can be assigned to various pins by programming the corresponding pin MUXing control register for each pin to a specific value between 0 and 6.The default values of these registers are 0, which is GPIO mode. The summary of the available interfaces and their corresponding pin MUX settings is shown in Table 8-1. For specific programming instructions, refer to ATWILC1000B Programming Guide. Table 8-1. Pin-MUX Matrix of External Interfaces 8.1 I2C Slave Interface The I2C Slave interface, used primarily for control by the host processor, is a two-wire serial interface consisting of a serial data line (SDA, Pin 33) and a serial clock (SCL, Pin 32). It responds to the seven bit address value 0x60. The ATWILC1000B I2C supports I2C bus Version 2.1 - 2000 and can operate in standard mode (with data rates up to 100Kb/s) and fast mode (with data rates up to 400Kb/s). The I2C Slave is a synchronous serial interface. The SDA line is a bidirectional signal and changes only while the SCL line is low, except for STOP, START, and RESTART conditions. The output drivers are open-drain to perform wire-AND functions on the bus. The maximum number of devices on the bus is limited by only the maximum capacitance specification of 400pF. Data is transmitted in byte packages. For specific information, refer to the Philips Specification entitled “The I2C -Bus Specification, Version 2.1”. The I2C Slave timing is provided in Figure 8-1 and Table 8-2. |
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