W26010A

64K

× 16 HIGH-SPEED CMOS STATIC RAM

Publication Release Date: May 2001

- 1 -

Revision A5

GENERAL DESCRIPTION

The W26010A is a high-speed, low-power CMOS static RAM organized as 65,536

× 16 bits that

operates on a single 5-volt power supply. This device is manufactured using Winbond's high

performance CMOS technology.

The W26010A has an active low chip select, separate upper and lower byte selects, and a fast output

enable. No clock or refreshing is required. Separate byte select controls (#LB and #UB) allow individual

bytes to be written and read. #LB controls I/O1-I/O8, the lower byte. #UB controls I/O9

−I/O16, the

upper byte. This device is well suited for use in high-density, high-speed system applications.

FEATURES

+5V power supply

− No clock or refreshing

− #LB (I/O1−I/O8), #UB (I/O9−I/O16)

Type II TSOP

PIN CONFIGURATION

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

A0

A1

A2

A3

A4

#CS

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

I/O8

#WE

A5

A6

A7

A8

NC

NC

A9

A10

A11

A12

NC

I/O9

I/O10

I/O11

I/O12

I/O13

I/O14

I/O15

I/O16

#LB

#UB

#OE

A13

A14

A15

BLOCK DIAGRAM

A0

.

.

A15

I/O1

I/O16

.

.

DATA I/O

DECODER

CONTROL

#UB

#CS

#OE

#WE

#LB

CORE

ARRAY

PIN DESCRIPTION

SYMBOL

DESCRIPTION

A0

−A15

Address Inputs

I/O1

−I/O16

Data Inputs/Outputs

#CS

Chip Select Inputs

#WE

Write Enable Input

#OE

Output Enable Input

#LB

Lower Byte Select I/O1

−I/O8

#UB

Upper Byte Select I/O9

−I/O16

Power Supply

Ground

NC

No Connection