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IDT5V9351 Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT5V9351 Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 10 page INDUSTRIALTEMPERATURERANGE IDT5V9351 LOWVOLTAGEPLLCLOCKDRIVER 1 MARCH 2003 IDT5V9351 INDUSTRIAL TEMPERATURE RANGE LOW VOLTAGE PLL CLOCK DRIVER DESCRIPTION: The IDT5V9351 is a high performance, zero delay, low skew, phase-lock loop (PLL) clock driver. It has four banks of configurable outputs. The IDT5V9351usesadifferentialPECLreferenceinputandanexternalfeedback input. These features allow the IDT5V9351 to be used as a zero delay, low skewfan-outbuffer. REF_SELallowsselectionbetweenPECLinputorTCLK, a CMOS clock driver input. IfPLL_ENissettolowandREF_SELtohigh,itwillbypassthePLL. Bydoing so,theIDT5V9351willbeinclockbuffermode. AnyclockappliedtoTCLKwill be divided down to four output banks. When PLL_EN is set high, PLL is enabled. Any clock applied to TCLK will be clocked in both phase and frequency to FBIN. PECL clock is activated by settingREF_SELtolow. The IDT logo is a registered trademark of Integrated Device Technology, Inc. © 2003 Integrated Device Technology, Inc. DSC-5972/16 FEATURES: • Fully integrated PLL • Output frequency up to 200MHz • 2.5V and 3.3V Compatible • Compatible with PowerPC™, Intel, and high performance RISC microprocessors • Output frequency configurable • Cycle-to-cycle jitter max. 22ps RMS • Compatible with MPC9351 • Available in TQFP package FUNCTIONAL BLOCK DIAGRAM QD2 QD3 QD4 QD1 QD0 QC0 QC1 QB QA ÷2 ÷4 ÷8 1 0 1 0 1 0 DQ DQ DQ DQ 1 0 fSELA fSELB fSELC fSELD PECL_CLK PECL_CLK PLL_En tCLK REF_SEL OE FBIN 1 0 (pullup) (pulldown) (pulldown) 200 - 400MHz REF PLL FB 1 0 (pulldown) (pulldown) (pullup) (pulldown) (pulldown) (pulldown) (pulldown) |
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