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TB5D1M Datasheet(PDF) 11 Page - Texas Instruments |
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TB5D1M Datasheet(HTML) 11 Page - Texas Instruments |
11 / 16 page www.ti.com APPLICATION INFORMATION Power dissipation S(VSn I Sn ) (1) S(VLn I Ln ) (2) T J + TA ) (PD q JA ) (3) T J + TA ) (PD q JA(S) ) (4) q JA(S) + (q JC ) q CA ) (q JB ) q BA ) (q JC ) q CA ) q JB ) q BA ) 40 60 80 100 120 140 0 100 200 300 400 500 D, Low−K DW, Low−K D, High−K DW, High−K Air Flow − LFM TB5D1M, TB5D2H SLLS579B – SEPTEMBER 2003 – REVISED MAY 2004 the device and PCB. JEDEC/EIA has defined standardized test conditions for measuring θ JA. Two commonly used conditions are the low-K and the The power dissipation rating, often listed as the high-K boards, covered by EIA/JESD51-3 and package dissipation rating, is a function of the ambi- EIA/JESD51-7 respectively. Figure 14 shows the ent temperature, TA, and the airflow around the low-K and high-K values of θ JA versus air flow for this device. This rating correlates with the device's maxi- device and its package options. mum junction temperature, sometimes listed in the The standardized θ JA values may not accurately absolute maximum ratings tables. The maximum represent the conditions under which the device is junction temperature accounts for the processes and used. This can be due to adjacent devices acting as materials used to fabricate and package the device, heat sources or heat sinks, to nonuniform airflow, or in addition to the desired life expectancy. to the system PCB having significantly different ther- There are two common approaches to estimating the mal characteristics than the standardized test PCBs. internal die junction temperature, TJ. In both of these The second method of system thermal analysis is methods, the device’s internal power dissipation, PD, more accurate. This calculation uses the power needs to be calculated. This is done by totaling the dissipation and ambient temperature, along with two supply power(s) to arrive at the system power dissi- device and two system-level parameters: pation: • θ JC, the junction-to-case thermal resistance, in degrees Celsius per watt • θ JB, the junction-to-board thermal resistance, in and then subtracting the total power dissipation of the degrees Celsius per watt external load(s): • θ CA, the case-to-ambient thermal resistance, in degrees Celsius per watt • θ BA, the board-to-ambient thermal resistance, in The first TJ calculation uses the power dissipation degrees Celsius per watt. and ambient temperature, along with one parameter: θ JA, the junction-to-ambient thermal resistance, in In this analysis, there are two parallel paths, one degrees Celsius per watt. through the case (package) to the ambient, and another through the device to the PCB to the ambi- The product of PD and θJA is the junction temperature ent. The system-level junction-to-ambient thermal im- rise above the ambient temperature. Therefore: pedance, θ JA(S), is the equivalent parallel impedance of the two parallel paths: where The device parameters θ JC and θJB account for the internal structure of the device. The system-level parameters θ CA and θBA take into account details of the PCB construction, adjacent electrical and mech- anical components, and the environmental conditions including airflow. Finite element (FE), finite difference (FD), or computational fluid dynamics (CFD) pro- grams can determine θ CA and θBA. Details on using these programs are beyond the scope of this data sheet, but are available from the software manufac- turers. Figure 14. Thermal Impedance vs Air Flow Note that θ JA is highly dependent on the PCB on which the device is mounted, and on the airflow over 11 |
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