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SLG46127 Datasheet(PDF) 14 Page - Dialog Semiconductor |
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SLG46127 Datasheet(HTML) 14 Page - Dialog Semiconductor |
14 / 88 page 000-0046127-101 Page 13 of 87 SLG46127 6.0 Summary of Macro Cell Function 6.1 I/O Pins • Digital Input (low voltage or normal voltage, with or without Schmitt Trigger) • Open Drain Outputs • Push Pull Outputs • Analog I/O • 10 k /100 k/1 Mpull-up/pull-down resistors 6.2 Connection Matrix • Digital matrix for circuit connections based on user design 6.3 Analog Comparators (2 total) • Selectable hysteresis 0 mV/25 mV/50 mV/200 mV 6.4 Voltage Reference • Used for references on Analog Comparators • Can also be driven to external Pin 10 6.5 Combinational Logic Look Up Tables (LUTs – 4 total) • Two 2-bit Lookup Tables • Two 3-bit Lookup Tables 6.6 Combination Function Macrocells (7 total) • Two Selectable DFF/Latch or 2-bit LUTs • Two Selectable DFF/Latch or 3-bit LUTs • One Selectable Pipe Delay or 3-bit LUT • One Selectable CNT/DLY or 4-bit LUT • One Programmable Delay/ Deglitch Filter 6.7 Delays/Counters (3 total) • Three 8-bit delays/counters with external clock/reset: Range 1-255 clock cycles 6.8 Pipe Delay (Part of Combination Function Macrocell) • 8 stage / 2 output • Two 1-8 stage selectable outputs. 6.9 Programmable Delay (Part of Combination Function Macrocell) • 125 ns/250 ns/375 ns/500 ns @ 3.3 V • Includes Edge Detection function |
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