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AD5255 Datasheet(PDF) 13 Page - Analog Devices |
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AD5255 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 20 page  AD5255 Rev. 0 | Page 13 of 20 Table 6. RDAC R/W EEPROM Addresses (CMD/ REG = 0, EE/RDAC = 1) A4 A3 A2 A1 A0 Byte Description 0 0 0 0 0 RDAC0 8 LSBs 0 0 0 0 1 RDAC0 MSB 0 0 0 1 0 RDAC1 8 LSBs 0 0 0 1 1 RDAC1 MSB 0 0 1 0 0 RDAC2 7 bits 0 0 1 0 1 11 bytes RDAC User EEPROM …to… 0 1 1 1 1 Table 7. RDAC Command Table (CMD/REG = 1) C3 C2 C1 C0 Command Description 0 0 0 0 NOP 0 0 0 1 Restore EEPROM to RDAC1 0 0 1 0 Store RDAC to EEPROM2 0 0 1 1 Decrement RDAC 6 dB 0 1 0 0 Decrement All RDACs 6 dB 0 1 0 1 Decrement RDAC 1 Step 0 1 1 0 Decrement All RDACs 1 Step 0 1 1 1 Reset. Restore EEPROM to all RDACs 2 1 0 0 0 Increment RDACs 6 dB 1 0 0 1 Increment All RDACs 6 dB 1 0 1 0 Increment RDAC 1 Step 1 0 1 1 Increment All RDAC 1 Step 1 1 0 0 Reserved …to… 1 1 1 1 1 Command leaves the device in the EEPROM read power state. Issue the NOP command to return the device to the idle state. 2 Command requires acknowledge polling after execution. RDAC Interface Operation Each programmable resistor wiper setting is controlled by specific RDAC registers, as shown in Table 5. Each RDAC register corresponds to an EEPROM memory location, which provides nonvolatile wiper storage functionality. RDAC registers and their corresponding EEPROM memory locations are programmed and read independently from each other. The RDAC register is refreshed by the EEPROM locations either with a hardware reset via Pin 1, or by issuing one of the various RDAC register load commands shown in the Table 7. RDAC Write Setting the wiper position requires an RDAC write operation, shown in Figure 22. RDAC write operations follow a format similar to the EEPROM write interface. The only difference between an RDAC write and an EEPROM write operation is the use of an RDAC address byte in place of the memory address used in the EEPROM write operation. The RDAC address byte is described in detail in Table 5 and Table 6. As with the EEPROM write operation, any RDAC EEPROM (Shortcut Command 2) write operation disables the I2C interface during the internal write cycle. Acknowledge polling, as described in the EEPROM Interface section, is required to determine whether the write cycle is complete. RDAC Read The AD5255 provides two RDAC read operations. The first, shown in Figure 23, reads the contents of the current RDAC address counter. Figure 24 illustrates the second read operation, which allows users to specify which RDAC register to read by first issuing a “dummy write” command to change the RDAC address pointer, and then proceeding with the RDAC read operation at the new address location. The read-only RDAC EEPROM memory locations can also be read by using the address and bits specified in Table 6. |
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