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ML3356 Datasheet(PDF) 3 Page - LANSDALE Semiconductor Inc. |
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ML3356 Datasheet(HTML) 3 Page - LANSDALE Semiconductor Inc. |
3 / 9 page www.lansdale.com Page 3 of 9 Issue A LANSDALE Semiconductor, Inc. ML3356 Figure 3. Output Components of Signal, Noise, and Distortion Figure 4. Meter Current versus Signal Input 10 0 –10 –20 –30 –40 –50 –60 0.01 0.1 1.0 10 INPUT (mVrms) S + N + D fO = 100 MHz fm = 1.0 kHz ∆f = ± 75 kHz N + D N 700 600 500 400 300 200 100 0 0.010 0.1 1.0 10 100 1000 PIN 20 INPUT (mVrms) GENERAL DESCRIPTION This device is intended for single and double conversion VHF receiver systems, primarily for FSK data transmission up to 500 K baud (250 kHz). It contains an oscillator, mixer, lim- iting IF, quadrature detector, signal strength meter drive, and data shaping amplifier. The oscillator is a common base Colpitts type which can be crystal controlled, as shown in Figure 1, or L–C controlled as shown in figure 8. At higher VCC, it has been operated as high as 200 MHz. A mixer/oscillator voltage gain of 2 up to approximately 150 MHz, is readily achievable. The mixer functions well from an input signal of 10 µVrms, below which the squelch is unpredictable, up to about 10 mVrms, before any evidence of overload. Operation up to 1.0 Vrms input is permitted, but non–linearity of the meter output is incurred, and some oscillator pulling is suspected. The AM rejection above 10 mVrms is degraded. The limiting IF is a high frequency type, capable of being operated up to 50 MHz. It is expected to be used at 10.7 MHz in most cases, due to the availability of standard ceramic res- onators. The quadrature detector is internally coupled to the IF, and a 5.0 pF quadrature capacitor is internally provided. The –3dB limiting sensitivity of the IF itself is approximately 50 µV (at Pin 7), and the IF can accept signals up to 1.0 Vrms without distortion or change of detector quiescent DC level. The IF is unusual in that each of the last 5 stages of the 6 state limiter contains a signal strength sensitive, current sink- ing device. These are parallel connected and buffered to pro- duce a signal strength meter drive which is fairly linear for IF input signals of 10 µV to 100 mVrms (see Figure 4). A simple squelch arrangement is provided whereby the meter current flowing through the meter load resistance flips a comparator at about 0.8 Vdc above ground. The signal strength at which this occurs can be adjusted by changing the meter load resistor. The comparator (+) input and output are available to permit control of hysteresis. Good positive action can be obtained for IF input signals of above 30 µVrms. The 130 kΩ resistor shown in the test circuit provides a small amount of hysteresis. Its connection between the 3.3k resistor to ground and the 3.0 k pot, permits adjustment of squelch level without changing the amount of hysteresis. The squelch is internally connected to both the quadrature detector and the data shaper. The quadrature detector output, when squelched, goes to a DC level approximately equal to the zero signal level unsquelched. The squelch causes the data shaper to produce a high (VCC) output. The data shaper is a complete ‘‘floating’’ comparator, with back to back diodes across its inputs. The output of the quad- rature detector can be fed directly to either input of this ampli- fier to produce an output that is either at VCC or VEE, depending upon the received frequency. The impedance of the biasing can be varied to produce an amplifier which “follows” frequency detuning to some degree, to prevent data pulse width changes. When the data shaper is driven directly from the demodula- tor output, Pin 13, there may be distortion at Pin 13 due to the diodes, but this is not important in the data application. A use- ful note in relating high/low input frequency to logic state: low IF frequency corresponds to low demodulator output. If the oscillator is above the incoming RF frequency, then high RF frequency will produce a logic low (input to (+) input of Data Shaper as shown in Figures 1 and 2). APPLICATION NOTES The ML3356 is a high frequency/high gain receiver that requires following certain layout techniques in designing a sta- ble circuit configuration. The objective is to minimize or elim- inate, if possible, any unwanted feedback. |
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