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TLE2021IP Datasheet(PDF) 4 Page - Texas Instruments |
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TLE2021IP Datasheet(HTML) 4 Page - Texas Instruments |
4 / 79 page TLE202x, TLE202xA, TLE202xB, TLE202xY EXCALIBUR HIGH-SPEED LOW-POWER PRECISION OPERATIONAL AMPLIFIERS SLOS191B – FEBRUARY 1997 – REVISED JANUARY 2002 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1OUT 1IN – 1IN + VCC+ 2IN + 2IN – 2OUT NC 4OUT 4IN– 4IN + VCC –/GND 3IN + 3IN – 3OUT NC DW PACKAGE (TOP VIEW) 3 2 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 4IN + NC VCC–/GND NC 3IN + 1IN + NC VCC+ NC 2IN + NC – No internal connection 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1OUT 1IN – 1IN + VCC+ 2IN + 2IN – 2OUT 4OUT 4IN – 4IN + VCC–/GND 3IN + 3IN – 3OUT FK PACKAGE (TOP VIEW) J OR N PACKAGE (TOP VIEW) TLE2021Y chip information This chip, when properly assembled, display characteristics similar to the TLE2021. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax= 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. + – OUT IN + IN – VCC+ (7) (3) (2) (6) (4) VCC – /GND (1) (5) OFFSET N1 OFFSET N2 78 54 (1) (2) (3) (4) (5) (6) (7) |
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