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SN74LV221APWRE4 Datasheet(PDF) 3 Page - Texas Instruments |
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SN74LV221APWRE4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 19 page SN54LV221A, SN74LV221A DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT TRIGGER INPUTS SCLS450G − DECEMBER 1999 − REVISED APRIL 2005 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FUNCTION TABLE (each multivibrator) INPUTS OUTPUTS FUNCTION CLR A B Q Q FUNCTION L X X L H Reset H HX L H Inhibit H XL L H Inhibit H L ↑ Outputs enabled H ↓ H Outputs enabled ↑† L H Outputs enabled † This condition is true only if the output of the latch formed by the NAND gate has been conditioned to the logic 1 state prior to CLR going high. This latch is conditioned by taking either A high or B low while CLR is inactive (high). logic diagram, each multivibrator (positive logic) CLR Cext Rext/Cext R B A Q Q input/output timing diagram A B CLR Q Q tw tw Rext/Cext tw |
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