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FM16W08-SG Datasheet(PDF) 9 Page - Cypress Semiconductor |
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FM16W08-SG Datasheet(HTML) 9 Page - Cypress Semiconductor |
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9 / 18 page  FM16W08 Document Number: 001-86210 Rev. *F Page 9 of 18 AC Switching Characteristics Over the Operating Range Parameters [2] Description VDD = 2.7 V to 3.0 V VDD = 3.0 V to 5.5 V Unit Cypress Parameter Alt Parameter Min Max Min Max SRAM Read Cycle tCE tACE Chip enable access time – 80 – 70 ns tCA – Chip enable active time 80 – 70 – ns tRC – Read cycle time 145 – 130 – ns tPC – Pre-charge time 65 – 60 – ns tAS tSA Address setup time 0– 0– ns tAH tHA Address hold time 15 – 15 – ns tOE tDOE Output enable access time – 15 – 12 ns tHZ[3, 4] tHZCE Chip Enable to output HI-Z – 15 – 15 ns tOHZ[3, 4] tHZOE Output enable HIGH to output HI-Z – 15 – 15 ns Notes 2. Test conditions assume a signal transition time of 5 ns or less, timing reference levels of 0.5 × VDD, input pulse levels of 10% and 90% of VDD, output loading of the specified IOL/IOH and load capacitance shown in AC Test Conditions on page 8. 3. tHZ and tOHZ are specified with a load capacitance of 5 pF. Transition is measured when the outputs enter a high impedance state. 4. This parameter is characterized but not 100% tested. |
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