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IC42S16400-7TIG Datasheet(PDF) 8 Page - Integrated Circuit Solution Inc

Part # IC42S16400-7TIG
Description  1M x 16Bit x 4 Banks (64-MBIT) SDRAM
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Manufacturer  ICSI [Integrated Circuit Solution Inc]
Direct Link  http://www.icsi.com.tw
Logo ICSI - Integrated Circuit Solution Inc

IC42S16400-7TIG Datasheet(HTML) 8 Page - Integrated Circuit Solution Inc

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IC42S16400
8
Integrated Circuit Solution Inc.
DR034-0E 12/02/2003
AC ELECTRICAL CHARACTERISTICS
(At TA = 0 ~ 70°C, VDD = VDDQ = 3.3 ± 0.3V, VSS = VSSQ = 0V , unless otherwise noted)
-6
-7
Symbol Parameter
Min.
Max.
Min.
Max.
Units
tCK3
CLK Cycle Time
CAS Latency = 3
6
7.5
ns
tCK2
CAS Latency = 2
7.5
10
ns
tAC3
CLK to valid output delay(1)
CAS Latency = 3
5
5.4
ns
tAC2
CAS Latency = 2
6
6
ns
tCH
CLK high pulse width
2.5
2.5
ns
tCL
CLK low pulse width
2.5
2.5
ns
tCKE
CKE setup time
1.5
1.5
ns
tCKH
CKE hold time
0.8
0.8
ns
tAS
Address setup time
1.5
1.5
ns
tAH
Address hold time
0.8
0.8
ns
tCMS
Command setup time
1.5
1.5
ns
tCMH
Command hold time
0.8
0.8
ns
tDS
Data input setup time
1.5
1.5
ns
tDH
Data input hold time
0.8
0.8
ns
tOH3
Output data hold time(1)
CAS Latency = 3
2.5
2.7
ns
tOH2
CAS Latency = 2
2.5
3
ns
tLZ
CLK to output in low - Z
0—
0—
ns
tHZ
CLK to output in H - Z
2.5
5
2.7
5.4
ns
tRC
ROW cycle time
60
67.5
ns
tRAS
ROW active time
42
100,000
45
100,000
ns
tRCD
RAS to CAS delay
18
20
ns
tRP
Row precharge time
15
20
ns
tRRD
Row active to active delay
12
15
ns
tDPL
Data in to precharge
12
15
ns
tT
Transition time
110
110
ns
tRSC
Mode reg. set cycle
10
10
ns
tPDE
Power down exit setup time
7.5
7.5
ns
tSRX
Self refresh exit time
7.5
7.5
ns
tREF
Refresh Time
64
64
ms
Notes:
1. if clock rising time is longer than 1ns, (tr/2-0.5ns) should be added to the parameter.


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