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SLY2016 Datasheet(PDF) 3 Page - Infineon Technologies AG |
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SLY2016 Datasheet(HTML) 3 Page - Infineon Technologies AG |
3 / 5 page 2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA SLR/SLO/SLG/SLY2016 www.infineon.com/opto • 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany www.osram-os.com • +49-941-202-7178 3 March 23, 2000-01 AC Characteristics (guaranteed minimum timing parameters at VCC=5.0 V ±0.5 V) Note: 1) TACC=Set Up Time + Write Time + Hold Time Loading Data The desired data code (D0–D6) and digit address (A0, A1) must be held stable during the write cycle for storing new data. Data entry may be asynchronous. Digit 0 is defined as right hand digit with A1=A2=0.` Clearing the entire internal four-digit memory can be accom- plished by holding the clear (CLR) low for 1.0 msec minimum. The clear function will clear the ASCII RAM. Loading an illegal data code will display a blank. Typical Loading State Table Display Blanking Blank the display by loading a blank or space into each digit of the display or by using the (BL) display blank input. Setting the (BL) input low does not affect the contents of data memory. A flashing circuit can easily be constructed using a 555 as table multivibrator. Figure 3 illustrates a circuit in which varying R1 (100K~10K) will have a flash rate of 1.0 Hz~10 Hz. The display can be dimmed by pulse width modulating the (BL) at a frequency sufficiently fast to not interfere with the internal clock. The dimming signal frequency should be 2.5 kHz or higher. Dimming the display also reduces power consumption. Parameter Symbol –40 °C +25 °C +85°C Unit Address Set Up Time TAS 10 10 10 ns Write Time TW 60 70 90 ns Data Set Up Time TDS 20 30 50 ns Address Hold Time TAH 20 30 40 ns Data Hold Time TDH 20 30 40 ns Access Time TACC (1) 90 110 140 ns Clear Disable Time TCLRD 1.0 1.0 1.0 µs Clear Time TCLR 1.0 1.0 1.0 ms WR A1 A0 D6 D5 D4 D3 D2 D1 D0 Digit 3210 H previously loaded display G R E Y L LLH LLLH LH G R E E L L HHL HL HL HG R U E L H LH LLH H LLG L U E L HHHL LLLH LB L U E L L H H L LLH LH B L E E L L L H L H L HHHB L E W L X X see character code see char. set An example of a simple dimming circuit using a 556 is illus- trated in Figure 4. Adjusting potentiometer R3 will dim the dis- play by changing the blanking pulse duty cycle. Figure 3. Flashing Circuit Using a 555 and Flashing (Blanking) Timing Figure 4. Dimming Circuit Using a 556 and Dimming (Blanking) Timing Blanking Pulse Width ≈50% Duty Factor 500 ms 2 Hz Blanking Frequency 1 0 ~ ~ ~ ~ 555 Timer R1 4.7 K Ω R2 100 K Ω C4 0.01 µF C3 10 µF VCC=5.0 V To BL Pin on Display 1 2 3 4 8 7 6 5 C3 1000 pF 1 2 3 4 5 6 7 14 13 12 11 10 9 8 556 Dual Timer R2 47 K Ω R1 200 Ω C1 4700 pF C4 0.01 µF R3 500 K Ω VCC=5.0 V Dimming (Blanking) Control C2 0.01 µF To BL Pin on Display 1 0 200 µs Blanking Pulse Width 4 µs min., 196 µs max. 5 KHz Blanking Frequency ~ ~ ~ ~ |
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