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74LCX02MTR Datasheet(PDF) 1 Page - STMicroelectronics |
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74LCX02MTR Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 8 page 1/8 September 2001 s 5V TOLERANT INPUTS s HIGH SPEED : tPD = 4.4ns (MAX.) at VCC = 3V s POWER DOWN PROTECTION ON INPUTS AND OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V s PCI BUS LEVELS GUARANTEED AT 24 mA s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention) s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02 s LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) s ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V DESCRIPTION The 74LCX02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LCX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R SOP 74LCX02M 74LCX02MTR TSSOP 74LCX02TTR TSSOP SOP |
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