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ISL6261 Datasheet(PDF) 6 Page - Renesas Technology Corp

Part # ISL6261
Description  Single-Phase Core Regulator for IMVP-6짰 Mobile CPUs
Download  34 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL6261 Datasheet(HTML) 6 Page - Renesas Technology Corp

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ISL6261
FN9251 Rev 1.00
Page 6 of 34
Sep 27, 2006
Functional Pin Description
FDE
Forced diode emulation enable signal. Logic high of FDE with
logic low of DPRSTP# forces the ISL6261 to operate in diode
emulation mode with an increased VW-COMP voltage window.
PGD_IN
Digital Input. Suggest connecting to MCH_PWRGD, which
indicates that VCC_MCH voltage is within regulation.
RBIAS
A 147K resistor to VSS sets internal current reference.
VR_TT#
Thermal overload output indicator with open-drain output.
Over-temperature pull-down resistance is 10.
NTC
Thermistor input to VR_TT# circuit and a 60µA current source
is connected internally to this pin.
SOFT
A capacitor from this pin to GND pin sets the maximum slew
rate of the output voltage. The SOFT pin is the non-inverting
input of the error amplifier.
OCSET
Overcurrent set input. A resistor from this pin to VO sets
DROOP voltage limit for OC trip. A 10µA current source is
connected internally to this pin.
VW
A resistor from this pin to COMP programs the switching
frequency (eg. 6.81K = 300kHz).
COMP
The output of the error amplifier.
FB
The inverting input of the error amplifier.
VDIFF
The output of the differential amplifier.
VSEN
Remote core voltage sense input.
RTN
Remote core voltage sense return.
DROOP
The output of the droop amplifier. DROOP-VO voltage is the
droop voltage.
DFB
The inverting input of the droop amplifier.
VO
An input to the IC that reports the local output voltage.
1
40
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3
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6
7
8
9
10
30
29
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27
26
25
24
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21
39
38
37
36
35
34
33
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31
11
12
13
14
15
16
17
18
19
20
VID2
VID1
VID0
VCCP
LGATE
VSSP
PHASE
UGATE
BOOT
NC
FDE
PGD_IN
RBIAS
VR_TT#
NTC
SOFT
OCSET
VW
COMP
FB
GND PAD
(BOTTOM)


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