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PC7447MG1200L Datasheet(PDF) 4 Page - ATMEL Corporation |
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PC7447MG1200L Datasheet(HTML) 4 Page - ATMEL Corporation |
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4 / 66 page  4 PC7457/47 [Preliminary] 5345B–HIREL–02/04 General Parameters Table 1 provides a summary of the general parameters of the PC7457. Features This section summarizes features of the PC7457 implementation of the PowerPC archi- tecture. Major features of the PC7457 are as follows: • High-performance, superscalar microprocessor – As many as 4 instructions can be fetched from the instruction cache at a time – As many as 3 instructions can be dispatched to the issue queues at a time – As many as 12 instructions can be in the instruction queue (IQ) – As many as 16 instructions can be at some stage of execution simultaneously – Single-cycle execution for most instructions – One instruction per clock cycle throughput for most instructions – Seven-stage pipeline control • Eleven independent execution units and three register files – Branch processing unit (BPU) features static and dynamic branch prediction 128-entry (32-set, four-way set-associative) branch target instruction cache (BTIC), a cache of branch instructions that have been encountered in branch/loop code sequences. If a target instruction is in the BTIC, it is fetched into the instruction queue a cycle sooner than it can be made available from the instruction cache. Typically, a fetch that hits the BTIC provides the first four instructions in the target stream 2048-entry branch history table (BHT) with two bits per entry for four levels of prediction – not-taken, strongly not-taken, taken, and strongly taken Up to three outstanding speculative branches Branch instructions that don’t update the count register (CTR) or link register (LR) are often removed from the instruction stream Eight-entry link register stack to predict the target address of Branch Conditional to Link Register (BCLR) instructions Table 1. Device Parameters Parameter Description Technology 0.13 µm CMOS, nine-layer metal Die size 9.1 mm × 10.8 mm Transistor count 58 million Logic design Fully-static Packages PC7447: surface mount 360 ceramic ball grid array (CBGA) PC7457: surface mount 483 ceramic ball grid array (CBGA) Core power supply 1.3V ±500 mV DC nominal or 1.1V ±50 mV (nominal, see Table 3 on page 12 I/O power supply 1.8V ±5% DC, or 2.5V ±5% for recommended operating conditions |
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