ISL6268

FN6348 Rev 0.00

Page 8 of 14

Aug 22, 2006

The ISL6268 has internal gate-drivers for the high-side and

low-side N-Channel MOSFETs. The LG gate-driver is

optimized for low duty-cycle applications where the low-side

MOSFET conduction losses are dominant, requiring a low

turn-off. The current transient through the gate at turnoff can be

MOSFET can be large. Adaptive shoot-through protection

prevents a gate-driver output from turning on until the opposite

gate-driver output has fallen below approximately 1V. The

dead-time shown in Figure 4 is extended by the additional

period that the falling gate voltage stays above the 1V

threshold. The high-side gate-driver output voltage is

measured across the UG and PHASE pins while the low-side

gate-driver output voltage is measured across the LG and

PGND pins. The power for the LG gate-driver is sourced

directly from the PVCC pin. The power for the UG gate-driver is

sourced from a “boot” capacitor connected across the BOOT

and PHASE pins. The boot capacitor is charged from a 5V bias

supply through a “boot diode” each time the low-side MOSFET

turns on, pulling the PHASE pin low. The ISL6268 has an

integrated boot diode connected from the PVCC pin to the

BOOT pin.

Diode Emulation

The ISL6268 normally operates in continuous conduction

mode (CCM), minimizing conduction losses by forcing the low-

side MOSFET to operate as a synchronous rectifier. An

improvement in light-load efficiency is achieved by allowing the

converter to operate in diode-emulation-mode (DEM), where

the low-side MOSFET behaves as a smart-diode, forcing the

device to block negative inductor current flow. Positive-going

inductor current flows from either the source of the high-side

MOSFET, or the drain of the low-side MOSFET. Negative-

going inductor current usually flows into the drain of the low-

side MOSFET. When the low-side MOSFET conducts positive

inductor current, the phase voltage will be negative with

respect to the GND and PGND pins. Conversely, when the

low-side MOSFET conducts negative inductor current, the

phase voltage will be positive with respect to the GND and

PGND pins. Negative inductor current occurs when the output

load current is less than half the inductor ripple current. Sinking

negative inductor through the low-side MOSFET lowers

efficiency through unnecessary conduction losses. Efficiency

can be further improved with a reduction of unnecessary

switching losses by reducing the PWM frequency. It is

decrease while in diode emulation. The extent of the frequency

reduction is proportional to the reduction of load current. Upon

entering DEM, the PWM frequency makes an initial step-

reduction because of a 33% step-increase of the window

the PHASE pin has detected positive voltage, while the LG

gate-driver pin is high, for eight consecutive PWM pulses. The

converter will return to CCM on the following cycle after the

PHASE pin detects negative voltage, indicating that the body

diode of the low-side MOSFET is conducting positive inductor

current.

Overcurrent and Short Circuit Protection

The overcurrent protection (OCP) and short circuit protection

connected across the ISEN and PHASE pins. The PHASE pin

is connected to the drain terminal of the low-side MOSFET.

The SCP setpoint is internally set to twice the OCP setpoint.

When an OCP or SCP fault is detected, the PGOOD pin will

pull down to 32

and latch off the converter. The fault will

remain latched until the EN pin has been pulled below the

The OCP circuit does not directly detect the DC load current

leaving the converter. The OCP circuit detects the peak of

positive-flowing output inductor current. The low-side MOSFET

inductor current when the high-side MOSFET is off. The

inductor current develops a negative voltage across the

the LG gate-driver output goes high. The ISEN pin sources the

GND pin. The negative voltage across the PHASE and GND

TABLE 1. PGOOD PULL-DOWN RESISTANCE

CONDITION

PGOOD RESISTANCE

VCC below POR

Undefined

Soft Start or Undervoltage

95



Overvoltage

63



Overcurrent

32



FIGURE 4. LG AND UG DEAD-TIME

UG

LG

50%

50%