ADS5121

5

SBAS281

www.ti.com

NAME

PINS

I/O

TERMINAL DESCRIPTION

C6, C7, E6, F1, F2, F3, F5, F6, J6, N3, P3, P5, P6, P7, R6, V6, W6

I

Analog Supply (1.8V)

AGND

A3, A5, B5, B9, C1, C5, C9, E3, E7, F7, G1, G5, G6, H6, J1, J2, M2, N5, N6, P8,

I

Analog Ground

R1, R2, R3, R7, U1, U5, U10, V5, V10, W3, W7

AINA+

U7

I

Analog Input Channel A

AINA–

V7

I

Complementary Analog Input Channel A

AINB+

W4

I

Analog Input Channel B

AINB–

V4

I

Complementary Analog Input Channel B

AINC+

T1

I

Analog Input Channel C

AINC–

T2

I

Complementary Analog Input Channel C

AIND+

P2

I

Analog Input Channel D

AIND–

P1

I

Complementary Analog Input Channel D

AINE+

G3

I

Analog Input Channel E

AINE–

G2

I

Complementary Analog Input Channel E

AINF+

D1

I

Analog Input Channel F

AINF–

D2

I

Complementary Analog Input Channel F

AING+

A4

I

Analog Input Channel G

AING–

B4

I

Complementary Analog Input Channel G

AINH+

B6

Analog Input Channel H

AINH–

A6

I

Complementary Analog Input Channel H

CLK

W9

I

Clock Input

REFT

K3, L1, J3

I/O

Reference Top

REFB

K5, J5, L5

I/O

Reference Bottom

CML

L2, L3

O

Common-Mode Level Output

BG

K1

I/O

Bandgap Decoupling (Decouple with 0.1

µF cap to AGND)

IREFR

K6

I

Internal Reference Bias Current (Connect 6.8k

Ω resistor

from this pin AGND to set internal bias amplifier current.)

DNC

L6

I

Do Not Connect

DNC

M1

I

Do Not Connect

NC

E1, E2, E5, K2, U6, W5

I

No Internal Connection

DCASEL

N2

I

Duty Cycle Adjust

C2, C3, C4, D3, E8, F8, H3, H5, M3, M5, R8, T3, U3, U4, U8, V3, P13, R13

I

Digital Supply (1.8V)

P17, L15, J14, F17, F12, E12

DGND

A2, A7, B1, B2, B3, B7, B13, C13, G15, H1, H2, H17, L17, M6, N1, N15, U2, U13,

I

Digital Ground

U14, V1, V2, V8, W2, W8

PDREF

V9

I

Power-Down Ref: 0 = internal reference, 1 = external

reference. In external reference mode connect REFT to

BG pin.

STBY A

W10

I

Power-Down Channel A

STBY B

P9

I

Power-Down Channel B

STBY C

R9

I

Power-Down Channel C

STBY D

U9

I

Power-Down Channel D

STBY E

C8

I

Power-Down Channel E

STBY F

B8

I

Power-Down Channel F

STBY G

A8

I

Power-Down Channel G

STBY H

A9

I

Power-Down Channel H

OE

P10

I

Enable all Digital Outputs, Ch. A-H. OE: 0 = Outputs

Enable. OE: 1 = Outputs disabled (3-state).

B17, C16, D17, E9, E10, E11, E17, F9, H14, H15, K17, L14, N14, P12, P14, P15

I

Driver Digital Supply (1.8V or 3.3V)

R10, R12, R14

I

DRGND

E13, F10, F11, F13, F14, F15, G14, G17, M14, M15, M17, N17, U11, U12, U15, U16

I

Driver Digital Ground

PIN DESCRIPTIONS

19

14,40 TYP

17

16

13

14

15

11

12

9

8

10

V

U

W

R

N

P

L

M

K

T

7

5

6

3

4

H

F

G

E

C

D

1

A

B

2

J

18

0,80

PIN CONFIGURATION

Bottom View

BGA