ISL9305IRTWCNYZEV1Z datasheet(9/17 Pages) RENESAS

Part #	ISL9305IRTWCNYZEV1Z

Description	3MHz Dual Step-Down Converters and Dual Low-Input LDOs with I2C Compatible Interface

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Manufacturer	RENESAS [Renesas Technology Corp]

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9 / 17 page

ISL9305

FN7605 Rev 2.00

Page 9 of 17

February 9, 2015

I2C Compatible Interface

The ISL9305 offers an I2C compatible interface, using two pins:

SCLK for the serial clock and SDAT for serial data respectively.

According to the I2C specifications, a pull-up resistor is needed for

the clock and data signals to connect to a positive supply. When

the ISL9305 and the host use different supply voltages, the pull-up

resistors should be connected to the higher voltage rail.

Signal timing specifications should satisfy the standard I2C bus

specification. The maximum bit rate is 400kb/s and more details

regarding the I2C specifications can be found from Philips.

I2C Slave Address

The ISL9305 serves as a slave device and the 7-bit default chip

address is 1101000, as shown in Figure 5 According to the I2C

specifications, here the value of Bit 0 determines the direction of

the message (“0” means “write” and “1” means “read”).

I2C Protocol

Figures 6, 7, and 8 show three typical I2C-bus transaction

protocols.

1

R/W

1

0

1

0

BIT 2

BIT 3

BIT 0

BIT 1

BIT 6

BIT 7

BIT 4

BIT 5

MSB

LSB

FIGURE 5. I2C SLAVE ADDRESS

S

0 A

P

SLAVE ADDRESS

REGISTER ADDRESS

DATA BYTE 1

R/W

AUTO INCREMENT

REGISTER ADDRESS

DATA BYTE N

AUTO INCREMENT

REGISTER ADDRESS

DATA BYTE 2

AUTO INCREMENT

REGISTER ADDRESS

A

SYSTEM HOST

ISL9305

A – ACKNOWLEDGE

N – NOT ACKNOWLEDGE

S – START

P – STOP

A

OPTIONAL

FIGURE 6. I2C WRITE

S

0 A

P

A

SLAVE ADDRESS

REGISTER ADDRESS

DATA BYTE 1

R/W

AUTO INCREMENT

REGISTER ADDRESS

S

1

SLAVE ADDRESS

R/W

N

DATA BYTE N

AUTO INCREMENT

REGISTER ADDRESS

A

DATA BYTE 2

AUTO INCREMENT

REGISTER ADDRESS

A

SYSTEM HOST

ISL9305

A – ACKNOWLEDGE

N – NOT ACKNOWLEDGE

S – START

P – STOP

OPTIONAL

FIGURE 7. I2C READ SPECIFYING REGISTER ADDRESS

S

1 A

P

A

SLAVE ADDRESS

DATA BYTE 1

R/W

AUTO INCREMENT

REGISTER ADDRESS

N

DATA BYTE N

AUTO INCREMENT

REGISTER ADDRESS

A

DATA BYTE 2

AUTO INCREMENT

REGISTER ADDRESS

SYSTEM HOST

ISL9305

A – ACKNOWLEDGE

N – NOT ACKNOWLEDGE

S – START

P – STOP

OPTIONAL

FIGURE 8. I2C READ NOT SPECIFYING REGISTER ADDRESS

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