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ISL6265A Datasheet(PDF) 10 Page - Renesas Technology Corp |
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ISL6265A Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 24 page  ISL6265A FN6884 Rev 0.00 Page 10 of 24 May 11, 2009 PHASE_NB Switch node of the Northbridge controller. This pin should connect to the source of the Northbridge channel upper MOSFET(s). BOOT_NB This pin is the upper gate drive supply voltage for the Northbridge controller. Connect an appropriately sized ceramic bootstrap capacitor between the BOOT_NB and PHASE_NB pins. An internal bootstrap diode connected to the PVCC pin provides the necessary bootstrap charge. PGND_NB The return path of the Northbridge controller lower gate driver. Connect this pin to the source of the lower MOSFET(s). OCSET CORE_0 and CORE_1 common overcurrent protection selection input. The voltage on this pin sets the (ISPx - ISNx) voltage limit for OC trip. VW0, VW1 A resistor from this pin to corresponding COMPx pin programs the switching frequency (for example, 6.81k ~ 300kHz). COMP0, COMP1 The output of the CORE_0 and CORE_1 controller error amplifiers respectively. FBx, VDIFFx, and COMPx pins are tied together through external R-C networks to compensate the regulator. FB0, FB1 These pins are the output voltage feedback to the inverting input of the CORE_0 and CORE_1 error amplifiers. VDIFF0, VDIFF1 Output of the CORE_0 and CORE_1 differential amplifiers. VSEN0, RTN0 Inputs to the CORE_0 VR controller precision differential remote sense amplifier. Connect to the sense pins of the VDD0_FB[H, L] portion of the processor. VSEN1, RTN1 Inputs to the CORE_1 VR controller precision differential remote sense amplifier. Connect to the sense pins of the VDD1_FB[H,L] portion of the processor. The RTN1 pin is also used for detection of the VDD_PLANE_STRAP signal prior to enable. ISP0, ISN0, ISP1, ISN1 These pins are used for differentially sensing the corresponding channel output current. The sensed current is used for channel balancing, protection, and core load line regulation. Connect ISN0 and ISN1 to the node between the RC sense elements surrounding the inductor of their respective channel. Tie the ISP0 and ISP1 pins to the VCORE side of their corresponding channel’s sense capacitor. These pins can also be used for discrete resistor sensing. BOOT0, BOOT1 These pins provide the bias voltage for the corresponding upper MOSFET drives. Connect these pins to appropriately chosen external bootstrap capacitors. Internal bootstrap diodes connected to the PVCC pin provide the necessary bootstrap charge. UGATE0, UGATE1 Connect these pins to the corresponding upper MOSFET gate(s). These pins control the upper MOSFET gate(s) and are monitored for shoot-through prevention. LGATE0, LGATE1 Connect these pins to the corresponding lower MOSFET gate(s). PHASE0, PHASE1 Switch node of the CORE_0 and CORE_1 controllers. Connect these pins to the sources of the corresponding upper MOSFET(s). These pins are the return path for the upper MOSFET drives. PGND0, PGND1 The return path of the lower gate driver for CORE_0 and CORE_1 respectively. Connect these pins to the corresponding sources of the lower MOSFETs. Theory of Operation The ISL6265A is a flexible multi-output controller supporting Northbridge and single or dual power planes required by Class M AMD Mobile CPUs. In single plane applications, both core voltage regulators operate single-phase. In uniplane core applications, the core voltage regulators are configured to operate as a two-phase regulator. All three regulator outputs include integrated gate drivers for reduced system cost and small board area. The regulators provide optimum steady-state and transient performance for microprocessor applications. System efficiency is enhanced by idling a phase in uniplane configurations at low-current and implementing automatic DCM-mode operation when PSI_L is asserted to logic low. The heart of the ISL6265A is the R3 Technology™, Intersil's Robust Ripple Regulator modulator. The R3 modulator combines the best features of fixed frequency PWM and hysteretic PWM while eliminating many of their shortcomings. The ISL6265A modulator internally synthesizes an analog of the inductor ripple current and uses hysteretic comparators on those signals to establish PWM pulse widths. Operating on these large-amplitude, noise-free synthesized signals allows the ISL6265A to achieve lower output ripple and lower phase jitter than either conventional hysteretic or fixed frequency PWM controllers. Unlike conventional hysteretic converters, the ISL6265A has an error amplifier that allows the controller to maintain a 0.5% voltage regulation accuracy throughout the |
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