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ISL26329FVZ Datasheet(PDF) 8 Page - Renesas Technology Corp |
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ISL26329FVZ Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 23 page ISL26320, ISL26321, ISL26322, ISL26323, ISL26324, ISL26325, ISL26329 FN8273 Rev 1.00 Page 8 of 23 September 5, 2013 tACQ Acquisition Time in Auto Sleep Mode 1.7 µs tACQ Acquisition time in Auto Power Down Mode 150 µs tSCLKH SCLK High Time 20 ns tSCLKL SCLK Low Time 20 ns tCNV CNV Pulse Width 100 ns NOTES: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 7. The device may become nonresponsive if the minimum acquisition times are not met in their respective modes, requiring a power cycle to restore normal operation. 8. Transition time to high impedance state is dominated by RC loading on the SDOUT pin. Specified value is measured using equivalent loading shown in Figure 2. Electrical Specifications VREF = VDD V, VDD = 2.7V to 5V, VCM = VDD/2, SCLK = 20MHz and TA = -40°C to +125°C (typical performance at +25°C), unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) SYMBOL PARAMETER TEST LEVEL OR NOTES MIN (Note 6) TYP MAX (Note 6) UNITS FIGURE 2. EQUIVALENT LOAD CIRCUIT FOR DIGITAL OUTPUT TESTING OUTPUT PIN CL 10pF VDD 2k RL |
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