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ISL68147IRAZ Datasheet(PDF) 4 Page - Renesas Technology Corp |
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ISL68147IRAZ Datasheet(HTML) 4 Page - Renesas Technology Corp |
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4 / 47 page  ISL68147 FN8880 Rev.2.00 Page 4 of 47 Jul 14, 2017 Functional Pin Descriptions Refer to Table 4 on page 19 for design layout considerations. PIN NUMBER PIN NAME DESCRIPTION 7, 6, 5, 4, 3, 2, 1 PWM[6:0] Pulse width modulation outputs. Connect these pins to the PWM input pins of 3.3V logic-compatible Intersil smart power stages, driver IC(s), or power stages. 8, 10 GND Ground pins. Connect directly to system GND plane. 9, 11, 12, 46, 47, 48 DNC Do not connect any signals to these pins. 13 EN0 Input pin used for enable control of Output 0. Active high. Connect to ground if not used. 14 EN1 Input pin used for enable control of Output 1. Active high. Connect to ground if not used. 15 TWARN Thermal warning flag. This open-drain output will be pulled low in the event of a sensed over-temperature at TMON pins without disabling the regulators. Maximum pull-up voltage is VCC. 16 PG0 Open-drain, power-good indicators for Output 0. Maximum pull-up voltage is VCC. 17 PG1 Open-drain, power-good indicators for Output 1. Maximum pull-up voltage is VCC. 18 SCL Serial clock signal pin for SMBus interface. Maximum pull-up voltage is VCC. 19 SDA Serial data signal pin for SMBus interface. Maximum pull-up voltage is VCC. 20 SALRT Serial alert signal pin for SMBus interface. Maximum pull-up voltage is VCC. 21 CONFIG Configuration ID selection pin. See Table 3 on page 16 for more details. 22 VINSEN Input voltage sense pin. Connect to VIN through a resistor divider (typically 402k/10k) with a 10nF decoupling capacitor. 23 VSEN1 Positive differential voltage sense input for Output 1. Connect to positive remote sensing point. Connect to ground if not used. 24 RGND1 Negative differential voltage sense input for Output 1. Connect to negative remote sensing point. Connect to ground if not used. 25, 27, 29, 31, 33, 35, 37 CSRTN[6:0] The CS and CSRTN pins are current sense inputs to individual phase differential amplifiers. Unused phases should have their respective current sense inputs grounded. The ISL68147 supports smart power stage, DCR, and resistor sensing. Connection details depend on the current sense method chosen. 26, 28, 30, 32, 34, 36, 38 CS[6:0] 39 RGND0 Negative differential voltage sense input for Output 0. Connect to negative remote sensing point. Connect to ground if not used. 40 VSEN0 Positive differential voltage sense input for Output 0. Connect to positive remote sensing point. Connect to ground if not used. 41 SA PMBus address selection pin. See Table 2 on page 12 for more details. 42 VCC Chip primary bias input. Connect this pin directly to a +3.3V supply with a high quality MLCC bypass capacitor. 43 VCCS Internally generated 1.2V LDO logic supply from VCC. Decouple with 4.7µF or greater MLCC (X5R or better). 44 TMON0 Input pin for external temperature measurement at Output 0. Supports diode based temperature sensing as well as smart power stage sensing. Refer to “Temperature Compensation” on page 15 for more information. 45 TMON1 Input pin for external temperature measurement at Output 1. Supports diode based temperature sensing as well as smart power stage sensing. Refer to “Temperature Compensation” on page 15 for more information. EPAD GND Package pad serves as GND return for all chip functions. Connect directly to system GND plane with multiple thermal vias. Driver, DrMOS, and Smart Power Stage Recommendations INTERSIL PART NUMBER QUIESCENT CURRENT (mA) GATE DRIVE VOLTAGE (V) NUMBER OF DRIVERS COMMENTS ISL99227 4.85 5 Single 60A, 5x5 smart power stage ISL99140 0.19 5 Single 40A, 6x6 DrMOS ISL6596 0.19 5 Single Connect ISL6596 VCTRL to 3.3V ISL6617A 5 N/A N/A Phase Doubler with 5V PWM output to be compatible with 60A DrMOS or with 60A smart power stage. Supports up to a 14-phase design. |
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