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W81E381D Datasheet(PDF) 8 Page - Winbond |
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W81E381D Datasheet(HTML) 8 Page - Winbond |
8 / 63 page W81E381D/W81E381AD Publication Release Date: January 2002 - 8 - Revision 0.52 3.1.1 48- pin LQFP package description SYMBOL TYPE PIN NO DESCRIPTIONS U US SB B P Piin ns s AVDD PWR 1 Analog 5V power supply AVSS PWR 2 Analog 5V power ground V33 PWR 5 USB DC power 3.3V output. D+ I/O 3 USB signal (+) D- I/O 4 USB signal (-) XTALI I 36 Crystal input. Use 6M Hz crystal. A 6 MHz clock source may also be used. XTALO O 37 Crystal output. E Ex xttrra a P Piin ns s PLLEN I 27 PLL enable pin; Schmitt-trigger pull up input u uC C P Piin ns s RVED1-3 X 21,41, 48 Reserved pins. Leave these pins floating. RST I L 29 RESET: A high on this pin for two machine cycles while the oscillator is running resets the device. P0.0 −P0.7 I/O D 46,47, 8,9, 15,16, 17,18 PORT 0: Function is the same as that of the standard 8052. P1.0 I/O 10 It is a high drive I/O pad. Used as a GPIO pin for memory-type SC P1.1 I/O 11 It is a high drive I/O pad. Used as a GPIO pin for memory-type SC P1.2 I/O 12 Used as a GPIO pin for memory-type SC P1.3 I/O 13 Used as a GPIO pin for memory-type SC P1.4 I/O 14 Used as a GPIO pin for memory-type SC P1.5 I/O 22 Used as a GPIO pin for memory-type SC P1.6 I/O 25 GPIO & remote wakeup pin P1.7 I/O 26 GPIO & external interrupt pin P2.2 I/O H 28 It’s a bi-directional I/O port with internal pull-ups. It can be programmed to be an output-latched port like an on-chip 74373, or a buffer input port like an on-chip 74244. |
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