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FM573-P Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers

Part # FM573-P
Description  Nonvolatile Octal Latch/Register
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Ramtron
FM573/574
27 March 2001
6/10
Electrical Specifications
Absolute Maximum Ratings
Description
Ratings
Ambient storage or operating temperature
-40
°C to + 85°C
Voltage on any pin with respect to ground
-1.0V to +7.0V
D.C. output current on any pin
TBD
Lead temperature (Soldering, 10 seconds)
300
° C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a
stress rating only, and the functional operation of the device at these or any other conditions above those listed in the
operational section of this specification is not implied. Exposure to absolute maximum ratings conditions for
extended periods may affect device reliability.
DC Operating Conditions TA = -40
° C to + 85° C, VDD = 2.7V to 5.5V unless otherwise specified
Symbol
Parameter
Min
Typ
Max
Units
Notes
VDD
Main Power Supply
2.7
5.5
V
1
VMIN
State change blocked/restored
2.40
2.5
2.54
V
1,8
ISB
Quiescent Supply Current
125
µA
2
IDDDY
Dynamic Supply Current
ex. 3.3V, 10 MHz, 8 inputs
20pF*V*f*n
5.28
A
mA
3,4,5
IDDNV
State Change Supply Current
500
µA
5
ILI
Input Leakage Current
10
µA
6
ILO
Output Leakage Current
10
µA
6
VIL
Input Low Voltage
-0.3
0.3*VDD
V
1
VIH
Input High Voltage
0.7*VDD
VDD + 0.5
V
1
VOH
Output High Voltage
@ IOH = -8 mA VDD>4V
@ IOH = -8 mA VDD<4V
VDD-0.8
VDD-1.0
V
1,7
VOL
Output Low Voltage
@ IOL = 8 mA
0.8
V
1,7
Notes
1.
Referenced to VSS.
2.
C = VSS, all other inputs at VDD or VSS
3.
Dynamic supply current depends on the clock frequency, the frequency of inputs toggling, and the number of
bits toggling. In the formula, V = VDD; f is clock frequency; n is the number of bits switching. The Dn inputs
toggle at approximately a 50% duty-cycle at ½ of the frequency of C and comply with the minimum setup time.
Outputs are tri-stated. All input levels at VDD and VSS. If C is static but the inputs toggle (573 in transparent
mode), then the f should be the frequency of the inputs.
4.
In a realistic system, the IDD needed to drive the loads also should be considered. IL = CL*V*fo *n where CL is
the load capacitance, V is the output swing voltage, fo is the output frequency, and n is the number of bits
switching.
5.
Changes in state cause a nonvolatile write which adds a DC current component to the static power or dynamic
for the duration of the nonvolatile write operation. The total current consumption after each state change = ISB +
IDDNV + IDDDY. After the state change is recorded, total current consumption = ISB + IDDDY.
6.
VIN or VOUT = VSS to VDD
7.
This parameter is characterized but not tested.
8.
All state changes will be ignored when VDD is below VMIN. VDD rising above VMIN causes the user latch to be
restored from the nonvolatile latch.


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