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PC87383 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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PC87383 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
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2 / 77 page  www.national.com 2 Revision 1.1 Features s LPC System Interface — Synchronous cycles, up to 33 MHz bus clock — 8-bit I/O cycles — Up to four 8-bit DMA channels — LPCPD and CLKRUN support — Implements PCI mobile design guide recommenda- tion (PCI Mobile Design Guide 1.1, Dec. 18, 1998) s PC2001 and ACPI Compliant — PnP Configuration Register structure — Flexible resource allocation for all logical devices ❏ Relocatable base address ❏ 15 IRQ routing options ❏ Three optional 8-bit DMA channels (where appli- cable) selected from four possible DMA chan- nels s Clock Sources — 14.318 MHz or 48 MHz clock input — LPC clock, up to 33 MHz s Power Supply — 3.3V supply operation — All pins are 5V tolerant, except LPC bus pins — All pins are back-drive protected, except LPC bus pins s 21 General-Purpose I/O (GPIO) Ports — 14 support assert IRQ — Programmable drive type for each output pin (open- drain, push-pull or output disable) — Programmable option for internal pull-up resistor on each input pin — Output lock option — Programmable option for input debounce mecha- nism s Serial Port (SP1) — Software compatible with the 16550A and the 16450 — Shadow register support for write-only bit monitoring — UART data rates up to 1.5 Mbaud s IEEE 1284-compliant Parallel Port — ECP, with Level 2 (14 mA sink and source output buffers) — Software or hardware control — Enhanced Parallel Port (EPP) compatible with EPP 1.7 and EPP 1.9 — Supports EPP as mode 4 of the Extended Control Register (ECR) — Selection of internal pull-up or pull-down resistor for Paper End (PE) pin — Supports a demand DMA mode mechanism and a DMA fairness mechanism for improved bus utiliza- tion — Protection circuit that prevents damage to the parallel port when a printer connected to it is pow- ered up or is operated at high voltages (in both cases, even if the PC87383 is in power-down state) s Fast Infrared Port (FIR) — Software compatible with the 16550A and the 16450 — Shadow register support for write-only bit monitoring — FIR IrDA 1.1 compliant — HP-SIR — ASK-IR option of SHARP-IR — DASK-IR option of SHARP-IR — Consumer Remote Control supports RC-5, RC-6, NEC, RCA and RECS 80 — DMA support: 1 or 2 channels s Strap Configuration — Base Address (BADDR) strap to determine the base address of the Index-Data register pair — Strap Inputs to select testability mode s Testability — XOR Tree — TRI-STATE device pins |
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