TFDU5107

Vishay Semiconductors

Rev. A1.4, 01-Nov-02

10 (13)

www.vishay.com

Document Number 82534

Appendix

Application Hints

The TFDU5107 do not need any external components

when operated at a ”clean” power supply. In a more

power supply noisy ambient it is recommended to add

a combination of a resistor and capacitor (R1, C1, C2)

for noise suppression as shown in the figure below. A

combination of a electrolytic for the low frequency

range and a ceramic capacitor for suppressing the

high frequency disturbance will be most effective. The

capacitor C3 is only necessary when inductive wiring

is used or the power supply cannot deliver the

operating peak pulse current.

The inputs TXD and SD are high impedance CMOS

inputs. Therefore, the lines from the I/O to those inputs

should be carefully designed not to pick up ambient

noise. If long lines are used, loads at the Txd input of

the TFDx5x07 and at the Rxd input of the controller (!)

are recommended. At the IRED Anode voltage supply

line an additional capacitor might be necessary when

inductive wiring is used. However, a low impedance

layout is the better and more cost efficient solution. For

adjusting the intensity depending on the application,

see the diagrams.

Recommended Circuit Diagram

TFDU5107

C3

R1

SD

Rxd

C1, (C3): 4.7

µF, see text

C2: 470 nF

C1

GND

Txd

8

6

4

1

3

5

7

GND

Vdd1

Rxd

Vdd2, IRED Anode

Txd

SD

C2

R2

Figure 7. Recommended Application Circuit

Shut Down

To shut down the TFDx5x07 into a standby mode the

SD pin has to be set active. After a delay of < 1 ms it

will switch to the standby mode.

0

100

200

300

400

500

02468

10

12

14

16

Current Control Resistor (

W )

15186

min. intensity in emission cone

"15

°

5.0V

emission cone

"15°

max. intensity in

5.25V

5.0V

5 V Applications

3.3V

3.6V

0

100

200

300

400

500

600

700

02468

10

12

Current Control Resistor (

W )

15187

emission cone

"15°

3.3V

max. intensity in

emission cone

"15°

min. intensity in

3 V Applications

Latency

The receiver is in specified conditions after the defined

latency. In a UART related application after that time

(typically 50

µs) the receiver buffer of the UART must

be cleared. Therefore, the transceiver has to wait at

least the specified latency after receiving the last bit

before starting the transmission to be sure that the

corresponding receiver is in a defined state.