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TPS726126DCQ Datasheet(PDF) 7 Page - Texas Instruments |
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TPS726126DCQ Datasheet(HTML) 7 Page - Texas Instruments |
7 / 16 page www.ti.com APPLICATION INFORMATION External Capacitor Requirements Regulator Protection THERMAL INFORMATION P D max + VI(avg) * VO(avg) I O(avg) ) V I(avg) x I (Q) (1) TPS726126 TPS72615, TPS72616 TPS72618, TPS72625 SLVS403F – MAY 2002 – REVISED MAY 2005 The TPS726xx family of low-dropout (LDO) regulators have numerous features that make it apply to a wide range of applications. The family operates with very low input voltage ( ≥1.8 V) and low dropout voltage (typically 200 mV at full load), making it an efficient stand-alone power supply or post regulator for battery or switch mode power supplies. Both the active low RESET and 1-A output current, make the TPS726xx family ideal for powering processor and FPGA supplies. The TPS726xx family also has low output noise (typically 150 µVRMS with 10-µF output capacitor), making it ideal for use in telecom equipment. A 1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS726xx, is required for stability. To improve transient response, noise rejection, and ripple rejection, an additional 10-µF or larger, low ESR capacitor is recommended. A higher-value, low ESR input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source, especially if the minimum input voltage of 1.8 V is used. Although an output capacitor is not required for stability, transient response and output noise are improved with a 10-µF output capacitor. The TPS726xx pass element has a built-in back diode that safely conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be appropriate. The TPS726xx also features internal current limiting and thermal protection. During normal operation, the TPS726xx limits output current to approximately 1.6 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below 145°C, regulator operation resumes. The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJmax) above which normal operation is not assured. A system designer must design the operating environment so that the operating junction temperature (TJ) does not exceed the maximum junction temperature (TJmax). The two main environmental variables that a designer can use to improve thermal performance are air flow and external heatsinks. The purpose of this information is to aid the designer in determining the proper operating environment for a linear regulator that is operating at a specific power level. In general, the maximum expected power (PD(max)) consumed by a linear regulator is computed as: Where: • VI(avg) is the average input voltage. • VO(avg) is the average output voltage. • O(avg) is the average output current. • I(Q) is the quiescent current. For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term VI(avg) x I(Q) can be neglected. The operating junction temperature is computed by adding the 7 |
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