IS75V16F128GS32 datasheet(7/52 Pages) ISSI

Part #	IS75V16F128GS32

Description	3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

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Manufacturer	ISSI [Integrated Silicon Solution, Inc]

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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

7

PRELIMINARY INFORMATION

Rev. 00D

03/24/03

IS75V16F128GS32

ISSI®

DC CHARACTERISTICS (Continued)

Symbol Parameter

Test Conditions

Min.

Typ.

Max.

Unit

IPD8r

PSRAM VCC Power

VCCr = VCCr max.,

—

80

µA

Down Current

CE1r

≥ VCCr - 0.2 V

(8M Partial)(8)

CE2r

≤ 0.2 V, VIN Cycle time = tRC min

VIL

Input Low Level

-0.3

—

0.5

V

VIH

Input High Level (FLASH 1 or FLASH 2 )

VCCf X 0.75 —

VCCf + 0.3

V

VIH

Input High Level (PSRAM)

VCCr X 0.75 —

VCCr + 0.3

V

VID

Voltage for Sector Protection

11.5

—

12.5

V

and Temp. Unprotection(

RESET)(4)

VACC

Voltage for

WP/ACC

8.5

9.0

9.5

V

Sector Protection/Unprotection

and Program Acceleration (4)

VOL

Output Low Level

VCCr = VCCr min., VCCS=VCCS min.

—

0.4

V

(PSRAM)

IOL = 1.0 mA

VOH

Output High Level

VCCr = VCCr min., VCCS=VCCS min.

2.2

—

V

(PSRAM)

IOH = -0.5 mA

VOL

Output Low Level

VCCf = VCCf min., VCCS=VCCS min.

—

0.45

V

(Flash)

IOL = 4.0 mA

VOH

Output High Level

VCCf = VCCf min., VCCS=VCCS min.

VCCf - 0.4

—

V

(Flash)

IOH = -0.1 mA

VLKO

FLASH Low Vccf

2.3

2.4

2.5

V

Lock-Out Voltage

Notes:

1. ICC current listed includes both the DC operating current and the frequency dependent component.

2. ICC active while Embedded Algorithm (program or erase) is in progress.

3. Automatic sleep mode enables the low power mode when address remains stable for 150 ns.

4. Applicable for only VCCf applying.

5. Embedded Algorithm (program or erase) is in progress. (@5 MHz)

6. ISB2 r depends on VIN cycle time. Please refer to “APPENDIX A”.

7. Standby current listed is for each FLASH chip.

8. Standby and Power down currents are reduced with Vccr < 3.0 V .

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