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MAX3740A Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAX3740A Datasheet(HTML) 4 Page - Maxim Integrated Products |
4 / 14 page 3.2Gbps SFP VCSEL Driver with Diagnostic Monitors 4 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (VCC = +2.97V to +3.63V, TA = -40°C to +85°C. Typical values are at VCC = +3.3V, TC1 and TC2 are shorted, PEAKSET open, TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SAFETY FEATURES (see the Typical Operating Characteristics section) High-Current Fault Threshold VBMTH VBIASMON > VBMTH causes a fault 0.7 0.8 0.9 V VBIAS Fault Threshold VBTH VBIAS referenced to VCC -0.250 -0.2 -0.150 V Power-Monitor Fault Threshold VPMTH VPWRMON > VPMTH causes a fault 0.7 0.8 0.9 V TX Disable Time t_OFF Time from rising edge of TX_DISABLE to IBIAS = IBIAS_OFF and IMOD = IMOD_OFF (Note 6) 1.8 5 µs TX Disable Negate Time t_ON Time from rising edge of TX_DISABLE to IBIAS and IMOD at 99% of steady state (Note 6) 55 500 µs Fault Reset Time t_INIT1 Time to set VFAULT = low after power-on or after rising edge of TX_DISABLE (Note 6) 60 200 ms Power-On Time t_INIT2 Time after power-on to transmitter-on with TX_DISABLE low (Note 6) 60 200 ms Fault Assert Time t_FAULT Time from fault occurrence to VFAULT = high; CFAULT < 20pF, RFAULT = 4.7kΩ (Note 6) 1.4 50 µs Fault Delay Time t_FLTDLY Time from fault to IBIAS = IBIAS_OFF and IMOD = IMOD_OFF (Note 6) 15 µs TX_DISABLE Reset t_RESET Time TX_DISABLE must be held high to reset FAULT (Note 6) 1µs Note 1: Supply current measurements exclude IBIAS from the total current. Note 2: Tested with RPEAK = 1.18kΩ. Note 3: Measured by applying a pattern that contains 20µs of K28.5, followed by 5µs of zeros, then 20µs of K28.5, followed by 5µs of ones. Data rate is equal to 2.5Gbps, with inputs filtered using 1.8GHz Bessel filters. Note 4: VBIAS < VCC - 0.7V. Note 5: Variation of bias monitor gain for any single part over the range of VCC, temperature, 3mA < IBIAS < 15mA. Note 6: Guaranteed by design and characterization. Note 7: Measured electrically with a 50Ω load AC-coupled to OUT+. Note 8: Deterministic jitter is the peak-to-peak deviation from the ideal time crossings measured with a K28.5 bit pattern at 3.2Gbps |
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