Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

ICS854057 Datasheet(PDF) 5 Page - Integrated Circuit Systems

Part # ICS854057
Description  4:1 OR 2:1 LVDS CLOCK MULTIPLEXER WITH INTERNAL INPUT TERMINATION
Download  13 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS854057 Datasheet(HTML) 5 Page - Integrated Circuit Systems

  ICS854057 Datasheet HTML 1Page - Integrated Circuit Systems ICS854057 Datasheet HTML 2Page - Integrated Circuit Systems ICS854057 Datasheet HTML 3Page - Integrated Circuit Systems ICS854057 Datasheet HTML 4Page - Integrated Circuit Systems ICS854057 Datasheet HTML 5Page - Integrated Circuit Systems ICS854057 Datasheet HTML 6Page - Integrated Circuit Systems ICS854057 Datasheet HTML 7Page - Integrated Circuit Systems ICS854057 Datasheet HTML 8Page - Integrated Circuit Systems ICS854057 Datasheet HTML 9Page - Integrated Circuit Systems Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 13 page
background image
854057AG
www.icst.com/products/hiperclocks.html
REV. A JULY 18, 2005
5
Integrated
Circuit
Systems, Inc.
ICS854057
4:1 OR 2:1 LVDS CLOCK MULTIPLEXER
WITH
INTERNAL INPUT TERMINATION
ADDITIVE PHASE JITTER
Additive Phase Jitter @ 622.08MHz
(12kHz to 20MHz)
= 66fs typical
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
100k
1M
10M
100M
500M
The spectral purity in a band at a specific offset from the funda-
mental compared to the power of the fundamental is called the
dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise
power present in a 1Hz band at a specified offset from the fun-
damental frequency to the power value of the fundamental. This
ratio is expressed in decibels (dBm) or a ratio of the power in
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The de-
the 1Hz band to the power in the fundamental. When the re-
quired offset is specified, the phase noise is called a
dBc value,
which simply means dBm at a specified offset from the funda-
mental. By investigating jitter in the frequency domain, we get a
better understanding of its effects on the desired application over
the entire time record of the signal. It is mathematically possible
to calculate an expected bit error rate given a phase noise plot.
vice meets the noise floor of what is shown, but can actually be
lower. The phase noise is dependant on the input source and
measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)


Similar Part No. - ICS854057

ManufacturerPart #DatasheetDescription
logo
Integrated Circuit Syst...
ICS854054 ICST-ICS854054 Datasheet
250Kb / 13P
   DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER
ICS854054AG ICST-ICS854054AG Datasheet
250Kb / 13P
   DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER
ICS854054AGLF ICST-ICS854054AGLF Datasheet
250Kb / 13P
   DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER
ICS854054AGLFT ICST-ICS854054AGLFT Datasheet
250Kb / 13P
   DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER
ICS854054AGT ICST-ICS854054AGT Datasheet
250Kb / 13P
   DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER
More results

Similar Description - ICS854057

ManufacturerPart #DatasheetDescription
logo
Integrated Device Techn...
854S057B IDT-854S057B_16 Datasheet
532Kb / 15P
   4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination
logo
Renesas Technology Corp
854S057B RENESAS-854S057B Datasheet
776Kb / 16P
   4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination
February 10, 2016
854S057 RENESAS-854S057 Datasheet
485Kb / 16P
   4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination
2019
889474 RENESAS-889474 Datasheet
407Kb / 17P
   2:1 LVDS Multiplexer With 1:2 Fanout and Internal Termination
11/11/15
logo
Integrated Device Techn...
889474 IDT-889474 Datasheet
216Kb / 16P
   2:1 LVDS Multiplexer With 1:2 Fanout and Internal Termination
logo
Micrel Semiconductor
SY89545L MICREL-SY89545L_08 Datasheet
165Kb / 10P
   3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with INTERNAL INPUT TERMINATION
SY89545L MICREL-SY89545L Datasheet
160Kb / 10P
   3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with INTERNAL INPUT TERMINATION
SY89544U MICREL-SY89544U Datasheet
311Kb / 10P
   2.5V, 3.2Gbps, DIFFERENTIAL 4:1 LVDS MULTIPLEXER WITH INTERNAL INPUT TERMINATION
SY89474UMG MICREL-SY89474UMG Datasheet
424Kb / 11P
   Precision LVDS 2:1 Multiplexer with 1 2 Fanout and Internal Termination
SY89547L MICREL-SY89547L_09 Datasheet
218Kb / 11P
   3.3V, 3.2Gbps DIFFERENTIAL 4:1 LVDS MULTIPLEXER with 1:2 FANOUT and INTERNAL TERMINATION
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com