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TMS470R1A64

16/32-Bit RISC Flash Microcontroller

SPNS099 – NOVEMBER 2004

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Zero-pin phase-locked loop (ZPLL) clock module

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Analog watchdog (AWD) timer

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Real-time interrupt ( RTI) module

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Two serial peripheral interface (SPI) modules

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Two serial communication interface (SCI) modules

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Standard CAN controller (SCC)

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Class II serial interface (C2SIa)

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10-bit multi-buffered analog-to-digital converter (MibADC), 8-input channels

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High-end timer (HET) controlling 13 I/Os

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External Clock Prescale (ECP)

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Up to 39 I/O pins and 1 input-only pin

The functions performed by the 470+ system module (SYS) include:

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Address decoding

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Memory protection

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Memory and peripherals bus supervision

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Reset and abort exception management

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Prioritization for all internal interrupt sources

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Device clock control

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Parallel signature analysis (PSA)

This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt

priority, and a device memory map. For a more detailed functional description of the SYS module, see the

TMS470R1x System Module Reference Guide (literature number SPNU189).

The A64 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte, half-word,

and word modes.

The Flash memory on the A64 device is a nonvolatile, electrically erasable and programmable memory

implemented with a 32-bit-wide data bus interface.The Flash operates with a system clock frequency of up to 24

MHz. In pipeline mode, the Flash operates with a system clock frequency of up to 48 MHz. For more detailed

information on the Flash, see the F05 Flash section of this data sheet and the TMS470R1x F05 Flash Reference

Guide (literature number SPNU213).

The A64 device has six communication interfaces: two SPIs, two SCIs, an SCC, and a C2SIa. The SPI provides

a convenient method of serial interaction for high-speed communications between similar shift-register type

devices. The SCI is a full-duplex, serial I/O interface intended for asynchronous communication between the

CPU and other peripherals using the standard non-return-to-zero (NRZ) format. The SCC uses a serial,

multimaster communication protocol that efficiently supports distributed real-time control with robust communi-

cation rates of up to 1 megabit per second (Mbps). The SCC is ideal for applications operating in noisy and

harsh environments (e.g., industrial fields) that require reliable serial communication or multiplexed wiring. The

standard.

For more detailed functional information on the SPI, SCI, and SCC peripherals, see the specific TMS470R1x

Peripheral Reference Guides (literature numbers SPNU195, SPNU196, and SPNU197, respectively). For more

detailed functional information on the C2SIa peripheral, see the TMS470R1x Class II Serial Interface A (C2SIa)

Reference Guide (literature number SPNU218).

The HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications.

The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and an

attached I/O port. The HET can be used for compare, capture, or general-purpose I/O. It is especially well suited

for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses.

For more detailed functional information on the HET, see the TMS470R1x High-End Timer (HET) Reference

Guide (literature number SPNU199).

(2)

SAE Standard J1850 Class B Data Communication Network Interface.

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